4 ms·
I learned the FPGA ropes by making (from scratch, reinventing many wheels) a fast interface between dbus (TI calculator link port) and a standard serial port in
by rvalles 5y ago
I learned the FPGA ropes by making (from scratch, reinventing many wheels) a fast interface between dbus (TI calculator link port) and a standard serial port in Verilog. It is dramatically faster than every other "link cable" available.[1]
Thanks to IceStorm/yosys/nextpnr, I never had to touch a proprietary tool to do this.
There's now very cheap, OSHW development boards to get started with[2].
[1] https://github.com/rvalles/dbus_ti_link_uart_verilog https://github.com/rvalles/dbus_ti_link_uart_verilog
[2] https://joelw.id.au/FPGA/CheapFPGADevelopmentBoards https://joelw.id.au/FPGA/CheapFPGADevelopmentBoards