3 ms·
> all DMA operations were subject to normal virtual memory paging rules. That's the key right there. Many embedded SoC's I've worked with have DMA engines, but
by Unklejoe 5y ago
> all DMA operations were subject to normal virtual memory paging rules.
That's the key right there. Many embedded SoC's I've worked with have DMA engines, but they are all behind the MMU and only work with physical addresses. It makes using them for something like "accelerated memcpy" kind of cumbersome and usually not even worth it unless it's moving HUGE chunks of memory (to overcome the page table walk that you have to do first).
- monocasa 5y agoThankfully we're starting to get IO-MMUs on larger systems with DMA controllers like that. Much easier to pass around.
- dvdkhlng 5y agoWell, I recently found the Cortex-M SoCs to be a blessing in that regard: no MMU, no need to run a fully fledged operating system, but still with LwIP, FreeRTOS&friends, they can handle surprisingly complex software tasks, while the lack of MMU and privilege-separation means that all the hardware: DMA-engines, communication interfaces and accelerator facilities (2-D GPU) are right at the tip of your hands.