> Had Intel done that 20-25 years ago the story might be completely different. One of the fundamental challenges for x86 at that time would have been the CISC

> Had Intel done that 20-25 years ago the story might be completely different. One of the fundamental challenges for x86 at that time would have been the CISC ISA and decoder complexity overhead. The overhead of the full CISC ISA was just unacceptable for an embedded application. That's probably why Intel was fiddling around with XScale around that time. With the P6 lineage, the x86 instructions were decomposed into micro-ops, RISC like instructions, that were executed by the CPU. I've read that decoders at the time accounted for up to 10% of power consumed. Intel really didn't start to address this problem until Pentium M and later Core. Had Intel launched something alongside P6 in the early 90s they might be relevant in that space but they were targeting the datacenter and mainframe space at that time so they were thinking big, not small.