4 ms·

It seems the author gets a little bit confused by the FMA instructions: > AArch64 nmadd equation is -(A * C) - B [...] Having an add instruction subtract is a

by adwn 5y ago

It seems the author gets a little bit confused by the FMA instructions: > AArch64 nmadd equation is -(A * C) - B [...] Having an add instruction subtract is a curious decision from ARM [...] AArch64's nmsub equation is (A * C) - B, which isn't negated at all. Yet AArch64's msub is negated, for whatever reason, so we used that instead. We've learned not to question it. Re-arrange those equations a bit, and you get: msub: (b - ac) nmadd: -(b + ac) nmsub: -(b - ac) And suddenly, it all makes sense :-)

deleted 5y ago
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masklinn 5y ago
The negated variant make sense compared to the original, it's really the definition of msub which is strange, I would expect msub to subtract the last operand from the multiplication, not the other way around. The AMD64 mnemonics actually encode this order e.g. VFMADD213PDy is 2 * 1 + 3 (ba + c) while VFMADD132PDy is 1 * 3 + 2 (ac+b). Though apparently the Dolphin folks disagree either way and interpret nmadd as (nm)add, rather than n(madd).
- pm215 5y ago
  The Arm ARM says FNMADD is "Floating-point Negated fused Multiply-Add", so the position of the hyphens points strongly to "n(madd)" rather than "(nm)add".
  - a1369209993 5y ago
    > ARM says FNMADD is "Floating-point Negated fused Multiply-Add", so the position of the hyphens points Never mind the hyphens, what do they think a "Negated fused Multiply" is?
pm215 5y ago
In the spec, the pseudocode defines them as FMADD: addend + ( op1 * op2) FMSUB: addend + (-op1 * op2) FNMADD: -addend + (-op1 * op2) FNMSUB: -addend + ( op1 * op2) which is to say that in all three cases the result is the output of a fused multiply-add; the difference is just whether (a) the addend and (b) op1 are negated before feeding them in. IEEE 754-2008 only defines that you have to provide a fusedMultiplyAdd() operation, so it's up to the CPU architecture whether folding in the free negations is something they want to provide, and if so, where exactly the negation is done.

by adwn 5y ago

deleted 5y ago

[deleted]

masklinn 5y ago

The negated variant make sense compared to the original, it's really the definition of msub which is strange, I would expect msub to subtract the last operand from the multiplication, not the other way around. The AMD64 mnemonics actually encode this order e.g. VFMADD213PDy is 2 * 1 + 3 (ba + c) while VFMADD132PDy is 1 * 3 + 2 (ac+b). Though apparently the Dolphin folks disagree either way and interpret nmadd as (nm)add, rather than n(madd).

pm215 5y ago
The Arm ARM says FNMADD is "Floating-point Negated fused Multiply-Add", so the position of the hyphens points strongly to "n(madd)" rather than "(nm)add".
- a1369209993 5y ago
  > ARM says FNMADD is "Floating-point Negated fused Multiply-Add", so the position of the hyphens points Never mind the hyphens, what do they think a "Negated fused Multiply" is?

pm215 5y ago

In the spec, the pseudocode defines them as FMADD: addend + ( op1 * op2) FMSUB: addend + (-op1 * op2) FNMADD: -addend + (-op1 * op2) FNMSUB: -addend + ( op1 * op2) which is to say that in all three cases the result is the output of a fused multiply-add; the difference is just whether (a) the addend and (b) op1 are negated before feeding them in. IEEE 754-2008 only defines that you have to provide a fusedMultiplyAdd() operation, so it's up to the CPU architecture whether folding in the free negations is something they want to provide, and if so, where exactly the negation is done.