ARM have got a long list of discarded or ignored technologies too. They've had several attempts at SIMD, and even when they did SVE it turned out that the "Sca

ARM have got a long list of discarded or ignored technologies too. They've had several attempts at SIMD, and even when they did SVE it turned out that the "Scalable" didn't extend down to microcontrollers like RISC-V's V extension does and they've had to introduce the slightly different and incompatible MVE as well to cover that. It will be interesting to see what happens in a few years when some applications start to want vector registers longer than 4096 bits, the upper limit by design of SVE's scalability. And then there are things such as Jazelle and T2EE. I firmly believe -- and have since it was announced in 2012 -- that the fixed length nature of aarch64 will eventually prove to be a mistake. Code density is important. They could do a mode like Thumb in the ARM7TDMI (which I have a ton of experience with), but it was Thumb2 in the Cortex series which really propelled ARM to their current heights. There is no room in the aarch64 encoding to do a Thumb2. It would need an entirely new ISA encoding. I think what probably happened is ARM managed to roughly match the (pretty awful) code density of x86_64 with a fixed length encoding and decided that was good enough as x86_64 was the only competition they were going to face in the 64 bit space. Except it's not.