I assume you’re talking about HAT (head on tails). The only way to mark in cache is to analyze the incoming streams which still uses significant power and can

I assume you’re talking about HAT (head on tails). The only way to mark in cache is to analyze the incoming streams which still uses significant power and can itself be bottlenecked. As I recall, there’s also occasional waste space on x85 because there’s so many length options. With RISC-V, chunks parse faster because you can skip (eg) 512 bytes and I believe only the last two bytes need to be inspected to ensure it’s sliced and potentially padded correctly. At that point, I don’t know that any other scheme is needed. All the fast ARMv8 implementations use uop cache and fast RISC-V implementations will do the same as they gain an even bigger advantage.