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Not quite a revolutionary cache design, we built a similar L2 is also L3 design 20 years ago in an x86 clone, chip was never released sadly, and of course all t
by Taniwha 5y ago
Not quite a revolutionary cache design, we built a similar L2 is also L3 design 20 years ago in an x86 clone, chip was never released sadly, and of course all the patents have now expired
- anonymousDan 5y agoWe being who?
- Taniwha 5y agoI probably shouldn't say :-) but those expired patents likely belong to AMD these days
- i386 5y agoCyrix?
- crest 5y agoIf it was 20 years ago the patents shouldn't last much longer...
- brandmeyer 5y agoThe entire point of the patent system is to encourage disclosure. Patents are by their very nature public information.
- wumpus 5y agoOn most modern cpus with multiple sockets, it's slower to fetch a L2 line from the other socket than to fetch it from main memory. Was this also true on your system?
- Taniwha 5y agothese were separate CPUs each with an L2 on the same die - we had a cache-line wide bus directly across the die