4 ms·
I think it is too risky at the moment, but in the future anything could happen. RISC-V still has a lot of undefined portions, and because of the way the archite
by barkingcat 5y ago
I think it is too risky at the moment, but in the future anything could happen. RISC-V still has a lot of undefined portions, and because of the way the architectural design is run in the open, it has a committee that is supposed to meet to evaluate proposals about fundamental parts of the architecture, things like memory management, what kind of arithmetic units and floating point units, what kind of instructions are in the instruction sets etc. If you look at the spec there are a lot of basic instructions that are "stubs" - basically they have the instruction names, but no implementation yet - and this is for quite basic parts of the instruction set. Individual RISC-V vendors/manufacturers are "designing their own" and trying to flesh it out, but in many cases they are not standard and may very well be proprietary.
I see this job posting as Apple recognizing that it is early in the game and that they'd really like to "set the direction" of RISC-V in a way that helps them (which only makes sense)
RISC-V is a long game - probably will yield rewards in about 10 years.
But no. You would not want a PC built on RISC-V now (and the question now is "which" RISC-V, the one with memory management or the one without?) - even for embedded boards, for example Beagle Board recently cancelled their BeagleV board https://beaglev.org/blog/2021-07-30-the-future-of-beaglev-community https://beaglev.org/blog/2021-07-30-the-future-of-beaglev-co...
not saying that Beagle is leaving Risc-v but most likely they want to use a different instruction set flavour of Risc-v and the current landscape is just too unstable (ie different hardware manufacturers have "different" Risc-v's and software won't run on one kind vs another kind)
- zozbot234 5y ago> If you look at the spec there are a lot of basic instructions that are "stubs" - basically they have the instruction names, but no implementation yet The "stub" parts of the spec are for yet-to-be-ratified extensions, there's a number of those in the pipeline including 'V' for vector compute and 'B' for bit manipulation. Those are indeed quite useful for general purpose compute, but one can hope that they'll take far less than 10 years to ratify.
- brucehoult 5y agoBefore the end of the year. "B" is already well into the 45 day Public Comment stage which is the last step before ratification. "V" is expected to enter that shortly. The "Scalar Crypto" extension entered the Public Comment stage a few days ago.