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Did IBM Just Preview the Future of Caches?
- addaon 5y agoReading this over, one striking thing is that in going from 14 nm -> 7 nm, they reduced core count from 12 to 8, and kept total cache per die approximately the same (256 MB L3 + various smaller caches -> 256 MB L2*). Looking at the die shot, there isn't an unusual amount of uncore, so this is either a MUCH smaller processor or a MUCH more complex core. Given that the Z series has never been particularly cost limited and has often pushed reticle size, and that by getting rid of the system controller costs will already be coming down... is this just a super-high transistor count SMT2 core?
- nullc 5y agoIIRC that L3 was eDRAM, so it's a bigger change than you might imagine.
- addaon 5y agoAh, that's a super interesting point. My vague recollection is that the size per bit for eDRAM is somewhere between a half and a third that for SRAM (isoprocess), so this would be doubling the cache effective area isoprocess... or probably somewhere between maintaining it and halving it with the move to 7 nm. Still looks like it might be less die space for cache, but not nearly as much as I was thinking as first.
- nullc 5y agoExactly. I'm left wondering if the move off of eDRAM was motivated by improved latency or just unavailability of the technology (or that it hadn't been updated to 7nm).
- addaon 5y agoWas eDRAM ever used for L2? I thought its latency put it firmly in L3/L4 camp.
- nullc 5y agoZ12 had a small (1MB) L2, and a 48MB shared eDRAM L3. In this new chip the L2 replaces the prior L2 and L3. Edit: similar deal for Z14 4MB/4MB L2 + 256MB eDRAM L3.
- Tuna-Fish 5y agoUnavailability. There simply is no process for making the deep trench capacitors that yields in <14nm.
- addaon 5y agoThinking about this a bit more, I suspect that the answer comes down to the two dies per package. The main distinction between on-die cores and off-die cores is the difference between L3 (single ejection) and L4 (double ejection), and the main use of die-to-die and package-to-package interconnect is going to be handling the L4 data flow. I bet that the numbers showed that goes from 256MB of cache on die (available for active-use L2 + shared L3) to more didn't make much of a difference; that's a pretty big L3 chunk, after all, and even if the latency for L4 is way higher I bet you're already well into marginal gains. In this case, and assuming that the package is thermally limited, there's no real reason not to go to a smaller die. Even if a 16 core, 512MB cache monster fit on reticle, if there's not much performance gap between that and the actual dual 8 core, 256MB cache system, why not take a yield gain from smaller dice? If this is the case, I'd expect this die to be way smaller than the Z15 processor... < 400 mm^2? Anyone have numbers?
- addaon 5y agoFollowup: Looks like 530 mm^2 [1], so quite a bit smaller than Z15 but not by a factor of two; consistent with nullc's eDRAM observation. [1]: https://wccftech.com/ibm-z-next-gen-processor-detailed-telum-chip-7nm-process-22-5-billion-transistors-8-cores-beyond-5-ghz-clocks/ https://wccftech.com/ibm-z-next-gen-processor-detailed-telum...
- IanCutress 5y agoFWIW, the article this thread links to says 530mm2.
- qwertox 5y ago> so this is either a MUCH smaller processor or a MUCH more complex core. According to the video presentation [1] each processor also contains an AI accelerator with more than 1000 compute engines for >6 TFlops [1] https://www.ibm.com/blogs/systems/ibm-telum-processor-the-next-gen-microprocessor-for-ibm-z-and-ibm-linuxone/ https://www.ibm.com/blogs/systems/ibm-telum-processor-the-ne...
- deleted 5y ago[deleted]
- Taniwha 5y agoNot quite a revolutionary cache design, we built a similar L2 is also L3 design 20 years ago in an x86 clone, chip was never released sadly, and of course all the patents have now expired
- anonymousDan 5y agoWe being who?
- Taniwha 5y agoI probably shouldn't say :-) but those expired patents likely belong to AMD these days
- i386 5y agoCyrix?
- crest 5y agoIf it was 20 years ago the patents shouldn't last much longer...
- brandmeyer 5y agoThe entire point of the patent system is to encourage disclosure. Patents are by their very nature public information.
- wumpus 5y agoOn most modern cpus with multiple sockets, it's slower to fetch a L2 line from the other socket than to fetch it from main memory. Was this also true on your system?
- Taniwha 5y agothese were separate CPUs each with an L2 on the same die - we had a cache-line wide bus directly across the die
- moralestapia 5y agoDown because too much traffic ... Completely tangential rant: I just saw a tweet of a guy serving 200k connections on a $5 USD instance. I believe it because I've experienced it first hand several times. Serving static pages in 2021 is not a big deal, at all. On the other hand, this is anandtech, a huge site that's been going on for years (decades?). For sure they get a lot of traffic, but I doubt they get something like 1M+ simultaneous requests per second. Can't they just solve this problem already? Whoever is in charge of their tech stack is hardly doing its job, this is unexcusable.
- zitterbewegung 5y agoMaybe they should use in some kind of caching service like Cloudflare?
- defaulty 5y agoThey could; or they could just generate static pages and serve from a nginx reverse proxy rather than fetching from databases, etc. The price is very different The NY Times does this for election day results because they fully expect that to get hit hard. They re-publish a static page every few minutes
- erk__ 5y agoSame reason you can sometimes view hacker news without being logged in when it is seemingly down
- nixpulvis 5y agoMaybe they should hire IBM to invent a virtual L5 cache for the website and "magically" move it all into our L2s for "government-authorized nuclear bunker" level service.
- moralestapia 5y agoMaybe they DID hire IBM and made all those things and still, after some years and a couple million dollars, the platform delivered can't handle more than 1,000 or so visitors.
- hesk 5y agoTwo questions: 1) How does a core know in which private cache of another core it can put the evicted data? Wouldn't that just remove data from that other core's cache that the other core needs? 2) Cores in today's processors can already read data from the private cache of another core (i.e., snooping), can they not?
- whack 5y ago> How does a core know in which private cache of another core it can put the evicted data? Good question. There are many ways of handling this and I'm curious how IBM decided to implement this. Though it's unlikely they will divulge such internal implementation details. > Wouldn't that just remove data from that other core's cache that the other core needs? "This becomes important for cloud services (yes, IBM offers IBM Z in its cloud) where tenants do not need a full CPU, or for workloads that don’t scale exactly across cores." > Cores in today's processors can already read data from the private cache of another core (i.e., snooping), can they not? Depends on the exact CPU and its implementation. But yes, this idea of a "private cache" is pretty silly and misleading. Each cache is just a small subset of the system's memory. And all cores can issue memory reads which will eventually get the data from somewhere. Whether you're reading it from your own private cache, or some other core's private cache, a shared cache, or from DRAM, does not change the final result. The only distinction here is in performance. Accessing a cache that is colocated to your core is much faster. Accessing a cache that is either shared or located elsewhere, is much slower. An approximate analogy would be using a us-east-1 ec2 instance to read from a us-east-1 RDS database, as opposed to a us-west-2 RDS database. The former database and its contents are certainly not "private", but they are a whole lot faster.
- ethbr0 5y agoI found the easiest way to think about it, when we were doing caches in computer architecture was to think of it in terms of abstraction. The CPUs have "read memory" and "write memory" as the only operations programs can see. The cache policies operate asynchronously (because multiple cores simultaneously executing), to make those happen in the fastest way possible. There's an endless variety of schemes and ways to design it, with the one huge requirement that it must ALWAYS be accurate. But as long as you can satisfy that, you can do some goofy, crazy stuff. Might be faster, might be slower, but it will work.
- ggm 5y agoPut in the cycle times for memory fetch, if you're going to say IBM's l4 cache can be 19 cycles
- ece 5y agoMost caches are going to have logic for tagging, eviction and invalidation for multiple other purposes, so this makes sense to do. There's some more accounting each core and L2 cache might have to do, but if the interconnect is up to the task, I'm not sure if this is that much more complex or an increase in latency compared to the old way. Just seems like a more efficient use of die area.
- jacob019 5y agoIBM still exists and makes processors? What architecture? Target market? Are they any good?
- josephcsible 5y agoYes: https://en.wikipedia.org/wiki/IBM_POWER_microprocessors https://en.wikipedia.org/wiki/IBM_POWER_microprocessors They're definitely good. They're what the Blackbird and FSF-RYF-certified Talos use: https://www.raptorcs.com/content/base/products.html https://www.raptorcs.com/content/base/products.html And they have another architecture (s390x) for mainframes too.
- CameronNemo 5y agoYes, probably POWER10, mainframes and financial databases (see article), no idea.
- guerrilla 5y agoThe IBM z series is for mainframes as the article explains. I think they're CISC. They also still make and develop POWER for supercomputing and scieintific workstations (and a tiny niche "PC" market.) Those supercomputers are dominating the charts though.
- CameronNemo 5y agoWait is the z series POWER or is it s390x?
- josephcsible 5y agoThe z series is s390x.
- guerrilla 5y agoIBM just refers to it as Z/Architecture now, the 64-bit sucessor of S/390 which looks like it ended in '98, no relation to POWER.
- deleted 5y ago[deleted]
- spoonjim 5y agoWhat’s running on this hardware? Who is writing new software for it? Clearly a lot because they have money to invest in this cutting edge R&D but I’ve never met anyone who says they code for IBM mainframes.
- NikolaNovak 5y agoYo (kind of:) There's the usual finance / banking guys. But also a lot of ERPs - the corporate bread and butter hr, Financials, crm, erm, scm, etc applications (I'm in this space, historically as sysadmin / light developer, then perf testing, infra architect, tech team lead, now as kind of a ops manager). Over my 25 years and few dozen projects, mainframe was a significant portion of implementations and almost always at least on the table as potential platform. Fwiw, What I always find fascinating though is that after many an implementation on "distributed platform", I. E. Unix Linux or Windows, as soon as any performance issue arises, there's a lot of calls to "move it back to mainframe" . I don't agree with that myself necessarily, but A lot of big enterprise shops feel that mainframe is an expensive pain, but reliable predictable well-performing expensive pain.
- algo_trader 5y ago> on "distributed platform", I. E. Unix Linux or Windows Is the mainframe really "more reliable" or "more performant" than a well provisioned cluster of commodity hw? I mean after 20 years of optimising the SW stack, and monster xeons and tera-memory and fibre-channels and SSDs and everything so cheap and accessible. Is it really tech or just corporate inertia keeping this industry alive? ;)
- jyounker 5y agoAs I recall, there have been something six attempts to move the airline scheduling systems off of mainframes, but the efforts keep failing to compete with the existing mainframes.
- flomo 5y agoFriday night HN thoughts... (1) IBM charges for "MIPS", so faster processor, mo' money. (2) Because of the humungo margins in this space, they have a great R&D budget. (3) The marketing has to be IBM mainframes are the most bestest and "worth it", so every gen is ahead in some respects. (4) IBM makes a lot of money outsourcing legacy mainframe workloads, so faster systems keeps them ahead of the curve there. Years ago, IBM had a partner offering mainframe Linux/Java "cloud servers". But that must not have added-up. They will tell their existing customers Z is great for these workloads but you don't see Google or Amazon buying them.
- dhosek 5y agoI used to work in the room next to the machine room at the University of Illinois at Chicago where we had an 80s vintage IBM mainframe. Because everything in the machine room was pretty big (the units holding the disk drives were about the size of a washing machine), it still kind of breaks my brain to think that there were microchips inside them. I like to imagine that the CPUs were the size of paperbacks, and to see stories like this just kind of messes with my brain. (At a previous employer, we got a tour of the data center where, along with racks and racks of commodity Linux servers, there was also an IBM mainframe. It was a sleek black piece of hardware about the size of a refrigerator, as I recall. Much prettier than those 80s machines, although is it really a mainframe without at least one 9-track tape drive?)
- simonh 5y agoChips yes, but microprocessors no. If it was a 3rd gen design the CPUs in that IBM mainframe would have been a large circuit board with a whole bunch of chips and TTLs, or racks of circuit boards. Third gen mainframes we’re still being built in the 90s and a single processing unit could contain thousands of chips. The 10-way IBM ES9000 9X2 contained over 5,000. Bear in mind mainframes aren’t about fast execution so much, they’re about massive parallelisation and I/O bandwidth.
- dhosek 5y agoFair enough. We routinely had several thousand interactive users at a time on UICVM back in the 80s. We had dedicated machines (effectively their own minicomputers) that managed terminal sessions so we could use commodity ASCII terminals or PCs running Kermit instead of IBM 3270 terminals. It still blows me away how small everything is in the twenty-first century.
- Anarch157a 5y agoDave Jones disassembled a mainframe CPU from a 90s vintage machine. It was the size of a paperback. Check his chanell on Youtube or Odysee.
- _tom_ 5y agoCan we please avoid clickbait titles?
- IanCutress 5y agoClickbait doesn't apply if the actual content is worth reading. Plus in this case the title is descriptive of the contents, although it might fall foul of Betteridge's Law.
- gigatexal 5y agoAll of the work we do in distributed systems and making things redundant and robust and stable, every time I read something about an IBM mainframe I think: “Those IBM engineers figured it all out already!” From the article: “ So What Has IBM Done That is So Revolutionary? In the first paragraph, I mentioned that IBM Z is their big mainframe product – this is the big iron of the industry. It’s built better than your government-authorized nuclear bunker. These systems underpin the critical elements of society, such as infrastructure and banking. Downtime of these systems is measured in milliseconds per year, and they have fail safes and fail overs galore – with a financial transaction, when it is made, it has to be committed to all the right databases without fail, or even in the event of physical failure along the chain. This is where IBM Z comes in. It’s incredibly niche, but has incredibly amazing design.”
- erk__ 5y agoYeah its interesting how each mainframe works like its own small distributed system while being a quite centralized one in reality.
- MichaelZuo 5y agoWell they should since they invented, and were first to market, for most of the innovations in the first place. They didn’t bother selling to startups like Google back when, and folks decided to recreate most of it on a cheaper basis, from what I understand.
- audunw 5y agoI thought the wording in the article sounded familiar, seems like this is basically the article in video form: https://www.youtube.com/watch?v=z6u_oNIXFuU https://www.youtube.com/watch?v=z6u_oNIXFuU
- MertsA 5y agoTechTechPotato is Dr. Ian Cutress, the author of the article.
- IanCutress 5y agoHello! :)
- jnorthrop 5y agoThank you for that well written article. As a curious techie, but someone unfamiliar with the subject, I found it approachable and easy to understand despite the complex topic. Not an easy task -- well done!
- IanCutress 5y agoThanks! The Chief Architect on the project messaged me this morning, saying he showed his wife my video (https://www.youtube.com/watch?v=z6u_oNIXFuU https://www.youtube.com/watch?v=z6u_oNIXFuU) on the topic last night and it sounds like she finally gets what he's been working on
- ppg677 5y agoFlexible use of L2 cache slices has been heavily explored in academia. Here is one example: http://www.cs.wisc.edu/multifacet/papers/ieeemicro08_virtual_hierarchies.pdf http://www.cs.wisc.edu/multifacet/papers/ieeemicro08_virtual...
- AliBoukeroui 5y agommm interesting