TinyFPGA BX ([1]) and nmigen/yosys as the fully open source toolchain for generating logic with Python and formally verifying it ([2], [3]). There is a good nMi

TinyFPGA BX ([1]) and nmigen/yosys as the fully open source toolchain for generating logic with Python and formally verifying it ([2], [3]). There is a good nMigen tutorial by Robert Baruch ([4]. [5]). Alternatively, if you really want to try Verilog first (not a bad idea), I enjoyed reading a book "Designing Video Game Hardware in Verilog" ([6]). 1. https://tinyfpga.com/ https://tinyfpga.com/ 2. https://m-labs.hk/gateware/nmigen/ https://m-labs.hk/gateware/nmigen/ 3. http://www.clifford.at/yosys/ http://www.clifford.at/yosys/ 4. https://github.com/RobertBaruch/nmigen-tutorial https://github.com/RobertBaruch/nmigen-tutorial 5. https://www.youtube.com/watch?v=85ZCTuekjGA&list=PLEeZWGE3PwbbjxV7_XnPSR7ouLR2zjktw https://www.youtube.com/watch?v=85ZCTuekjGA&list=PLEeZWGE3Pw... 6. https://www.amazon.com/gp/product/1728619440/ref=ppx_yo_dt_b_search_asin_title?ie=UTF8&psc=1 https://www.amazon.com/gp/product/1728619440/ref=ppx_yo_dt_b...