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> Is GateBoy a perfect simulation of a Game Boy? > Actually no, for complicated reasons. The Game Boy chip has a handful of logic gates that operate independen
by warning26 5y ago
> Is GateBoy a perfect simulation of a Game Boy?
> Actually no, for complicated reasons. The Game Boy chip has a handful of logic gates that operate independently of the master clock and whose exact behavior depends on things like gate delay. These gates create glitches that depend heavily on the physical placement of the gates, the silicon process used to make them, and other weird things like temperature and voltage.
This is fascinating, I previously would have assumed that a gate-level simulation would necessarily be perfect by definition.
- aappleby 5y agoAnd incredibly annoying as the developer - so much work translating and debugging gates, and it's still not "correct" for some definition of correct ;)
- deelowe 5y agoDon't be too annoyed. There are significant differences across models and even batches within the same generation of system. There is no completely correct definition of a system.
- mattcurrie 5y agoSome of these differences are CPU observable, so I made this ROM to identify different Game Boy models and revisions: https://github.com/mattcurrie/which.gb https://github.com/mattcurrie/which.gb
- deelowe 5y agoVery cool!
- grp000 5y agoSo is this saying that a possible modern day commercial for a Game Boy might feature: "The artisanal properties of the Nintendo Game Boy make each and every one a unique playing experience!"?
- ceronman 5y agoI guess it's impossible to ever have it correct. The gates are just another level of abstraction. You could also simulate the silicon atoms and the electrons flowing and use that to have transistors and then gates. And so on.
- BoxOfRain 5y agoReminds me of hearing about how Crash Bandicoot was developed, as well as being something of a masterpiece in itself they successfully debugged an issue that caused the memory card to get corrupted when the controller was touched in a certain way. I can't remember the precise reason but they eventually discovered that running one of the chips at a higher frequency introduced subtle electrical interference with nearby components on the board. This was after much debugging for a supposed software issue in the memory card logic. I often think of that when I have a tricky bug to sort out.
- williamdclt 5y agohttps://www.gamedeveloper.com/programming/my-hardest-bug-ever https://www.gamedeveloper.com/programming/my-hardest-bug-eve... A great and short read
- TheJoeMan 5y ago“ This is the only time in my entire programming life that I've debugged a problem caused by quantum mechanics “ Who knows, we may be running into this more literally in our lifetime.
- BoxOfRain 5y agoI suppose all problems of this world are caused by quantum mechanics in a sense.
- hbn 5y agoIf you want a great and long read, Andy Gavin has a pretty extensive series about Crash Bandicoot on his blog, some entries more technical than others. I've never even played the games for more than a few minutes, but I had a great time reading through these https://all-things-andy-gavin.com/video-games/making-crash/ https://all-things-andy-gavin.com/video-games/making-crash/
- deelowe 5y agoI read this as well. I'm definitely referencing this in the future when someone mentions how "FPGAs directly simulate the system hardware."
- aappleby 5y agoAs I understand it asynchronous logic stopped being a common thing decades ago, so those sorts of glitches aren't possible (or less possible?) now. The hard stuff in simulation now is probably handling multiple clock domains.
- deelowe 5y agoI’ve only ever seen behavioral solutions for newer systems. At a certain point, logic level designs become unreasonable.
- photojosh 5y agoStill out there, but only used in special situations. The ARM microcontroller I'm working with has an asynchronous prescaler on the real-time clock crystal input before it gets fed into a second synchronous prescaler which you can then read the output of directly. This is all about reducing power consumption down in the nA range when the CPU is turned off but the RTC keeps ticking over. Multiple clock domains definitely tricky though!
- jasonjayr 5y agoAs a software-only guy .... multiple clock domains sounds like the same class of problem as multi threaded + parallel programming, right?
- aappleby 5y agoSort of? It's almost more equivalent to networking or distributed processing - circuits in different clock domains can't just send a wire to another domain, they have to go through a synchronizer and do some handshaking and other stuff that's vaguely similar to RPCs. I'm stretching here, it's slightly beyond what I've worked with so far.
- flatiron 5y agoIf you simulate cycle accuracy you don’t need to simulate each gate. Think of pins on your cpu and the trillions of gates. If you simulated your cpu you just care what’s at the pins. Not at the gates.
- zamadatix 5y agoThis assumes the gate level implementation doesn't have any side effects that are related to more than an instantaneous state. Seemingly unlikely as that is a larger class than the group of side effects mentioned in the quote above.
- flatiron 5y agoYou are right. You buy nothing other than research for gate level. For accuracy you simply need cycle level (which is nothing easy mind you)
- matheusmoreira 5y ago> These gates create glitches What sort of glitches? Which effects could they produce on outputs? I wish there was a concrete example.
- gambiting 5y agoThere are examples on the github page, literally right below that sentence - have you stopped reading just before that point?? "For example, there's a glitch in the external address bus logic that causes internal bus addresses like 0xFF20 to appear on the external bus even though the logic should prevent that. Due to gate delays, not all of the inputs to gate LOXO (page 8 in Furrtek's schematics) arrive at the same time. This causes LOXO to produce a glitch pulse that in turn causes latch ALOR to make a copy of one bit of the internal bus address. ALOR then drives that bit onto the external bus (through a few more gates) where it can be seen with an oscilloscope or logic analyzer."
- Anunayj 5y agoBtw I'm a little confused, So are these "glitches" reliably same across all game boys or can this differ from chip to chip?
- randomswede 5y agoThey can differ from gameboy to gameboy. And from day to day (as some of them are apparently temperature dependent).
- rot13xor 5y agoLatches or a ring oscillator to generate true randomness. There could also be bugs in the design that cause metastability.
- p4bl0 5y agoThis is also the reason why it is so hard to protect against side channel leakage. During my PhD I worked on a solution that would be theoretically perfect (and is formally proved so), but is not in practice because of exactly that. You can find the paper (Formally Proved Security of Assembly Code Against Power Analysis) and presentation slides on my web page: https://pablo.rauzy.name/research.html#rauzy2014formaldpl https://pablo.rauzy.name/research.html#rauzy2014formaldpl