The mode is actually tracked/enforced by the CPU but the implementation differs per architecture. For example: > The hardware severely restricts the ways in wh

The mode is actually tracked/enforced by the CPU but the implementation differs per architecture. For example: > The hardware severely restricts the ways in which control can be passed from one ring to another, and also enforces restrictions on the types of memory access that can be performed across rings. Using x86 as an example, there is a special gate structure which is referenced by the call instruction that transfers control in a secure way. https://en.wikipedia.org/wiki/Protection_ring#Implementations https://en.wikipedia.org/wiki/Protection_ring#Implementation...