> its literally the execution port that's the holdup. Is if also a limitation of the register file ports/granularity? If not, what would stop Intel go add an i

> its literally the execution port that's the holdup. Is if also a limitation of the register file ports/granularity? If not, what would stop Intel go add an instruction that spill and fill a set of gp registers back and forth from memory (e.g. stack)?