From a skim through the article, it seems to require soldering onto the power line between the voltage regulator and the processor to trigger the voltage drop.

From a skim through the article, it seems to require soldering onto the power line between the voltage regulator and the processor to trigger the voltage drop. I don't believe the VR circuitry could be caused to glitch in the desired way by software / easily accessible physical components (i.e. plugging into USB). Someone might be able to develop a method of causing this to occur by targeting a draw elsewhere, but this will likely by motherboard specific (or even entire platform specific). It definitely means that SEV isn't going to save you if your vendors conspire against you, but unless your dealing with a determined state level actor, I doubt there is much risk to most of us. Internal actors (rogue staff) are likely to compromise in a simpler way. However this is great research, I imagine in CPU designs that are being planned now, there will be some work to ensure the Secure processor is protected, likely by making the processor fault when SP input voltage drops. Alternatively they might be able to move some power regulation onto the processor package providing buffering against voltage manipulation.