3 ms·
The complaint about churning through instruction-encoding space like x86 does each it wants to change the SIMD size seems reasonable, at least. Do all the ISAs
by mjw1007 5y ago
The complaint about churning through instruction-encoding space like x86 does each it wants to change the SIMD size seems reasonable, at least.
Do all the ISAs do that?
- f00zz 5y agoRISC-V vector instructions are not tied to register size.