4 ms·
Regarding Maxwell and Navi: Actually, that's not true. The micro-benchmark that suggested Maxwell (and later) was a tiled deferred gpu was actually measuring s
by phire 5y ago
Regarding Maxwell and Navi: Actually, that's not true.
The micro-benchmark that suggested Maxwell (and later) was a tiled deferred gpu was actually measuring something else. Each GPC gets assigned different sceenspace areas, and concurrency rules between the areas is relaxed (unless explicitly required by shader atomics).
The result looks somewhat like tiled deferred rendering in that micro-benchmark. But it's still very much immediate mode.
A similar thing happened with Navi.
However, there are mobile GPUs (Qualcomm's Adreno) that dynamically switch between tiled deferred mode and immediate mode on a per renderpass basis, depending on what driver heuristics suggest will be faster.
- Jasper_ 5y agoWhen did Adreno gain a deferred more? Back when I was talking to Rob Clark in 2014 or so, it sounded like it was all immediate per-tile.
- phire 5y agoGPU terminology is confusing at times. Imgtec and Apple use the term "Tile-Based Deferred Rendering" to mean a combination of tiling and deferred shading. Because that's what their GPUs do. Other vendors, like qualcomm [1] still use the term "Deferred" in regards to their Tile-Based Rendering, simply because the draw calls are deferred. It doesn't mean deferred shading. Every company appears to make the the terminology as they go. I found an early presentation from ARTX [2] and they are using database terminology to describe what we now call vertex buffers. [1] https://developer.qualcomm.com/docs/adreno-gpu/developer-guide/gpu/overview.html https://developer.qualcomm.com/docs/adreno-gpu/developer-gui... [2] http://www.graphics.stanford.edu/courses/cs448a-01-fall/lectures/tvh/tvh.2up.pdf http://www.graphics.stanford.edu/courses/cs448a-01-fall/lect...
- Jasper_ 5y agoGah, so when Qualcomm uses the word "deferred", they just mean "tiled", and each tile still rasterizes each tri in order. Agreed on terrible terminology, this is a disaster.
- ribit 5y agoI don't think anyone has ever suggested that Maxwell or Navi were doing tiled deferred rendering, but all evidence (as well as technical documentation) point to them doing tiled immediate rendering. The tests in question rely on an atomic variable to draw only a limit amount of fragments, and it is very clear that rasterization proceeds tile by tile, with obvious geometry binning. Which is the very definition of tiled rendering. The big difference between a modern desktop GPU and a run-of-the-mill mobile GPU is that the former uses much larger tiles and smaller binning buffers, so you start spilling tiles after just several dozen primitives. Desktop GPUs implement tiling primarily to improve memory access locality. Mobile GPUs on the other hand heavily invest into tiling because it is the basis of their existence, they wouldn't be able to do anything with that low power budget otherwise. > However, there are mobile GPUs (Qualcomm's Adreno) that > dynamically switch between tiled deferred mode and immediate > mode on a per renderpass basis I've seen multiple mentions that Adreno supports TBDR, but no actual evidence for it. When asked, folks usually give me some link or documentation that describes immediate mode tiled rendering. AFAIK, "real" TBDR has only ever been achieved by Imagination and Apple inherited it from it and deployed it at a large scale.