3 ms·

Remind what the ASIC acronym means

dragontamer 5y ago
Application specific integrated circuit. The Intel / AMD CPUs are an ASIC that execute x86 as quickly as possible. Turns out to be a very important application :-) My point being: you aren't going to beat a CPU at a CPU's job. A CPU is an ASIC that executes assembly language as quickly as possible. Everything in that chip is designed to accelerate the processing of assembly language. -------- You win vs CPUs by grossly changing the architecture. Traditionally, by using a systolic array. (Which is very difficult to make a general purpose processor for).
- Brian_K_White 5y ago
  I think it's at least a fair question to ask what makes "execute x86" such an important application? Sure the x86 cpu is the best way to execute x86 instructions, but so what? I do not actually care about x86. I don't write it or read it. I write bash and c and kicad and ooenscad and markdown etc..., and really even those are just todays convenient means of expression. The same "what's so untouchable about x86" is true for c. I actually care about manipulating data. I don't mean databases, I mean everything, like the input from a sensor and the output to an actuator or display is all just manipulating data at the lowest level. Maybe this new architecture idea can not perform my freecad modelling task faster or more efficiently than my i7, but I see nothing about the macroscopic job that dictates it's already being mapped to hardware in the most elegant way possible translating to x86 ISA and executing on an x86 asic.
  - dragontamer 5y ago
    > I think it's at least a fair question to ask what makes "execute x86" such an important application? x86, ARM, POWER9, and RISC-V are all the same class of assembly languages. There's really not much difference today in their architectures. All of them are heavily pipelined, heavily branch predicted, superscalar out-of-order speculative processors with cache coherence / snooping to provide some kind of memory model that's standardizing upon Acquire/Release semantics. (Though x86 remains in Total-store ordering model instead). It has been demonstrated that this architecture is the fastest for executing high level code from Bash, C, Java, Python, etc. etc. Any language that compiles down into a set of registers / jumps / calls (including indirect calls) that supports threads of execution are inevitably going to look a hell of a lot like x86 / ARM / POWER9. ---------- If you're willing to change to OpenCL / CUDA, then you can execute on SIMD-computers such as NVidia Ampere or AMD CDNA. Its a completely different execution model than x86 / ARM / POWER9 / RISC-V, with a different language to support the differences in performance (ex: x86 / POWER9 have very fast spinlocks. CUDA / OpenCL has very fast thread-barriers). There's a CUDA-like compiler for x86 AVX + ARM-NEON called "ispc" for people who want to have CUDA-like programming on a CPU. But it executes slower, because CPUs have much smaller SIMD-arrays than a GPU. (but there's virtually no latency, because x86 AVX / ARM-NEON SIMD registers are in the same core as the rest of their register space. Like... 1 clock or 2 clocks latency but nothing like the 10,000+ clock ticks to communicate to a remote GPU) ---------- Look, if webservers and databases and Java JITs / Bash interpreters / Python interpreters could be executed by something different (ex: a systolic array), I'm sure someone would have tried by now. But look at the companies who made Java: IBM and Sun. What kind of computers did they make? POWER9 / SPARC. That's the fruit of their research: the computer architecture that best suites Java programming according to at least two different sets of researchers. And what is POWER9? Its a heavily pipelined, heavily branch predicted, superscalar out-of-order speculative core with cache-coherent acquire/release semantics for multicore communication. Basically the same model as a x86 processor. POWER9 even has the same AES-acceleration and 128-bit vector SIMD units similar to x86's AVX or SSE instructions. You get a few differences (SMT4 on POWER9 and bigger L3 cache), but the overall gameplan is extremely similar to x86.
    - gnufx 5y ago
      There are some strange assertions there apart from the definition of ASIC. ISAs aren't assembly languages. I could believe there are may be more ARM and, particularly, RISC-V chips without all those features than with. Since when has C the language specified what it compiles to, to exclude Lisp machines? I read about Oak (later Java) on my second or third generation of SPARC workstation, when I'd used RS/6000. Few people remember what Sun did market to run Java exclusively. IBM might argue about the similarity of our POWER9 to x86 but I don't much care.

Application specific integrated circuit. The Intel / AMD CPUs are an ASIC that execute x86 as quickly as possible. Turns out to be a very important application :-) My point being: you aren't going to beat a CPU at a CPU's job. A CPU is an ASIC that executes assembly language as quickly as possible. Everything in that chip is designed to accelerate the processing of assembly language. -------- You win vs CPUs by grossly changing the architecture. Traditionally, by using a systolic array. (Which is very difficult to make a general purpose processor for).

Brian_K_White 5y ago
I think it's at least a fair question to ask what makes "execute x86" such an important application? Sure the x86 cpu is the best way to execute x86 instructions, but so what? I do not actually care about x86. I don't write it or read it. I write bash and c and kicad and ooenscad and markdown etc..., and really even those are just todays convenient means of expression. The same "what's so untouchable about x86" is true for c. I actually care about manipulating data. I don't mean databases, I mean everything, like the input from a sensor and the output to an actuator or display is all just manipulating data at the lowest level. Maybe this new architecture idea can not perform my freecad modelling task faster or more efficiently than my i7, but I see nothing about the macroscopic job that dictates it's already being mapped to hardware in the most elegant way possible translating to x86 ISA and executing on an x86 asic.
- dragontamer 5y ago
  > I think it's at least a fair question to ask what makes "execute x86" such an important application? x86, ARM, POWER9, and RISC-V are all the same class of assembly languages. There's really not much difference today in their architectures. All of them are heavily pipelined, heavily branch predicted, superscalar out-of-order speculative processors with cache coherence / snooping to provide some kind of memory model that's standardizing upon Acquire/Release semantics. (Though x86 remains in Total-store ordering model instead). It has been demonstrated that this architecture is the fastest for executing high level code from Bash, C, Java, Python, etc. etc. Any language that compiles down into a set of registers / jumps / calls (including indirect calls) that supports threads of execution are inevitably going to look a hell of a lot like x86 / ARM / POWER9. ---------- If you're willing to change to OpenCL / CUDA, then you can execute on SIMD-computers such as NVidia Ampere or AMD CDNA. Its a completely different execution model than x86 / ARM / POWER9 / RISC-V, with a different language to support the differences in performance (ex: x86 / POWER9 have very fast spinlocks. CUDA / OpenCL has very fast thread-barriers). There's a CUDA-like compiler for x86 AVX + ARM-NEON called "ispc" for people who want to have CUDA-like programming on a CPU. But it executes slower, because CPUs have much smaller SIMD-arrays than a GPU. (but there's virtually no latency, because x86 AVX / ARM-NEON SIMD registers are in the same core as the rest of their register space. Like... 1 clock or 2 clocks latency but nothing like the 10,000+ clock ticks to communicate to a remote GPU) ---------- Look, if webservers and databases and Java JITs / Bash interpreters / Python interpreters could be executed by something different (ex: a systolic array), I'm sure someone would have tried by now. But look at the companies who made Java: IBM and Sun. What kind of computers did they make? POWER9 / SPARC. That's the fruit of their research: the computer architecture that best suites Java programming according to at least two different sets of researchers. And what is POWER9? Its a heavily pipelined, heavily branch predicted, superscalar out-of-order speculative core with cache-coherent acquire/release semantics for multicore communication. Basically the same model as a x86 processor. POWER9 even has the same AES-acceleration and 128-bit vector SIMD units similar to x86's AVX or SSE instructions. You get a few differences (SMT4 on POWER9 and bigger L3 cache), but the overall gameplan is extremely similar to x86.
  - gnufx 5y ago
    There are some strange assertions there apart from the definition of ASIC. ISAs aren't assembly languages. I could believe there are may be more ARM and, particularly, RISC-V chips without all those features than with. Since when has C the language specified what it compiles to, to exclude Lisp machines? I read about Oak (later Java) on my second or third generation of SPARC workstation, when I'd used RS/6000. Few people remember what Sun did market to run Java exclusively. IBM might argue about the similarity of our POWER9 to x86 but I don't much care.