> 7 simultaneous integer operations, 4 simultaneous floating poin The floating point is going to be an interesting thing to look at - the CPUs made targeting H

> 7 simultaneous integer operations, 4 simultaneous floating poin The floating point is going to be an interesting thing to look at - the CPUs made targeting HPC workloads tend to be flops heavy, but the flops tend to be starved for memory bandwidth unless you're doing exactly the best vector processing you can & that fortran can do a great job with. So you throw in a lot more oomph on the vector side and leave single operation float arithmetic at 2. Floating point operations of a smaller size of values (more realistically, quarternions or rgba) would be the reason that M1 feels a little bit more snappy when it comes to basic things like text-layout code or graphics images which don't do SIMD very well, but still consume a lot of arithmetic. I'd suspect that the vertical integration is going to be the secret, because it looks like more profile information of desktop apps going into chip design here. A similar story is expected of the Graviton series as well, with AWS having a good idea what to build for.