3 ms·
That doesn't mean that your CPU isn't gonna optimize it anyways afterwards, see for instance all the macro-fusion cases described in here : https://en.wikichip.
by jcelerier 5y ago
That doesn't mean that your CPU isn't gonna optimize it anyways afterwards, see for instance all the macro-fusion cases described in here : https://en.wikichip.org/wiki/macro-operation_fusion https://en.wikichip.org/wiki/macro-operation_fusion
- astrange 5y agoAtomic instructions wouldn’t be reordered like that on a CPU, that’s the point of using them. Non-atomic ones might be, and volatile would since it’s only a C concept. Although it wouldn’t be through instruction fusion, more like non-coherent caches.