3 ms·
On the page you linked panics are only mentioned for load and store and the code below seems to work just fine? let x = atomic::AtomicU32::new(0); x.co
by spinlocker 5y ago
On the page you linked panics are only mentioned for load and store and the code below seems to work just fine?
let x = atomic::AtomicU32::new(0);
x.compare_exchange_weak(
0,
1,
atomic::Ordering::AcqRel,
atomic::Ordering::Relaxed).unwrap();
println!("{}", x.load(atomic::Ordering::Relaxed));
- raphlinus 5y agoAh, you're right. I was using the same ordering for success and failure. It is possible to use AcqRel in the success case.
- spinlocker 5y agoLooks like in C++ memory_order_acq_rel is treated like memory_order_acquire when it's a load and memory_order_release when it's a store. I would argue that this isn't really a difference in memory model but a difference in API.
- raphlinus 5y agoI agree. Sorry for the misdirection - the panic is something I observed when I was experimenting with it, and I misinterpreted it.