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This isn't in the name of 'security.' TSX has been functionally broken in every architecture that implements it. From the article: > A memory ordering issue i
by rrss 5y ago
This isn't in the name of 'security.' TSX has been functionally broken in every architecture that implements it.
From the article:
> A memory ordering issue is what is reportedly leading Intel to now deprecate TSX on various processors.
And from the Intel document linked in the article:
> The default RTM force-abort behavior can be optionally disabled by setting MSR bit TSX_FORCE_ABORT.SDV_ENABLE_RTM=1. However, when RTM force abort is disabled in this way, RTM usage may be subject to memory-ordering correctness issues. Due to these issues, this unsupported mode should not be
enabled for production use.