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SiFive P550 Core: High-Performance RISC-V Processor
- 1MachineElf 5y agoHopefully the recent acquisition rumors don't spell the end of this healthy competition between x86 and RISC-V. I wonder what we'll see as a result of this partnership with Intel: SiFive also confirmed that the IFC RISC-V application development platform will use the Performance P550 core on Intel's 7nm Horse Creek platform. Link: https://www.phoronix.com/scan.php?page=news_item&px=SiFive-Performance-P550-P270 https://www.phoronix.com/scan.php?page=news_item&px=SiFive-P...
- grlass 5y agoSiFive are definitely amongst the most interesting players in RISC-V right now. Though there other organisations doing things, e.g. the PULP Platform: https://news.ycombinator.com/item?id=23768080 https://news.ycombinator.com/item?id=23768080 I hope that the acquisition doesn't go through, more competition would be great, and perhaps within a decade a wider commercial RISC-V ecosystem could emerge.
- Koshkin 5y agoThere is no "healthy competition between x86 and RISC-V".
- nine_k 5y agoOnly between RISC-V and ARM?
- dragontamer 5y agoARM is a collection of many different cores. So yes, RISC-V probably competes well vs ARM-M, but I wouldn't say that RISC-V competes against ARM-A (which is starting to become big enough to compete against x86). Just because ARM-M and ARM-A shares an instruction set doesn't mean that those chips are anything alike. Heck, ARM-M0+ is a completely different chip than ARM-M4. ARM-R is roughly the target of RISC-V. (Realtime cores).
- monocasa 5y agoThe core in this article wouldn't be a very good ARM-R core being OoO. It's about the same niche as an A72 AFAICT. So RISCV is already nipping at the heels of the ARM application core space.
- dragontamer 5y agoARM Cortex R8 is out of order. https://www.arm.com/products/silicon-ip-cpu/cortex-r/cortex-r8 https://www.arm.com/products/silicon-ip-cpu/cortex-r/cortex-...
- monocasa 5y agoAnd AFAIK they didn't really get any takers there either because it didn't really make sense. I think ARM was hoping for a market of large legacy codebases (think cell modems) where the heavy hard realtime work had been migrated to fixed function IP blocks, DSPs, etc. years ago, but the vendor didn't want to spend the time migrating their RTOS to ARM-A from ARM-R for the intermittent, non realtime, but still compute intensive work. You can sort of see how they didn't get any uptake with how the marketing changed pretty heavily with the R82 towards storage vendors instead of 5G. And RISCV doesn't have even the hope of that network effect to bank on. I'd also expect features like per core TCM if this core was targeting ARM-R niches to at least break away from the non determinism of the memory hierarchy (particularly a multi core memory hierarchy!), but I don't see that here.
- nickik 5y agoThere are multiple vendors now selling RISC-V products that compete with ARM-A as well. Its not as far alone as the lower end but it defiantly happening as well.
- brucehoult 5y agoThe SiFive P550 is described as competing against the ARM Cortex A75 application processor, which was announced four years and one month ago. Previous SiFive cores compete against the A72 (announced but not yet shipping that I know of) and A55/A53 (shipping in the BeagleV "StarLight" beta and HiFive Unmatched and probably unannounced embedded applications). In the four years since the A75 ARM has announced the A76, A77, A78, and A710 as annual incremental improvements (the most recent of which are not available in products yet), plus in a new higher-end line the Cortex-X1 and X2. So ARM is not standing still, but SiFive is catching them at approximately two years of ARM progress every year i.e. closing the gap by one year per year.
- creddit 5y agoYeah, I really can't imagine how one would class it as healthy let alone even a serious competition. x86 and ARM, however, are starting to have a real battle with ARM owning mobile, making headwinds into laptops and desktops at Apple and multiple vendors producing meaningful server chips.
- deelowe 5y agoARM is making headwinds into server as well now.
- monocasa 5y agoIt's hard to tell apples->apples when you can't buy the leading edge ARM servers outright AFAIK. There's a good argument that it's in the hyperscalers' best interest to discount ARM usage to even below their breakeven to put negotiating pressure on their x86 core suppliers as long as they balance the costs well enough.
- JensensStapler 5y agoMerchant ARM server is mostly dead unfortunately. Hyperscalers like AWS are making their own SoCs in house however. Amazona acquired Annapurna labs for that purpose. Personally I see there being more market overlap between ARM and the P550 core however. Samsung, Qualcomm, Renesas are all planning to bring RISC-V cores to market. With performance between A75 and A76, I could see the P550 being a pretty major disruptor. We already know some RISC-V chips are gaining traction in embedded, IoT, RF, micro-controllers, etc. Automotive looks like the next big market for RISC-V to me.
- foobarbazetc 5y agoAh, this isn’t true. Ampere is very competitive and Oracle have made huge investments into that platform, with Cloudflare etc looking at it very seriously as well. Arm on servers is just getting started.
- 1-6 5y agoWith RISC-V and SiFive, companies are able to build their own optimizations and make them MORE proprietary. I'll cringe if VLC will come with various versions: x86, M1, IntelRISC-V, QualcommARM, SamsungARM, SamsungRISC-V etc.
- trevortheblack 5y agoThere was no "healthy competition between msn and google". There was no "healthy competition between Blockbuster and Netflix". There was no "healthy competition between Barnes & Noble and Amazon". Lack of competition today does not belie there never being competition. I would argue that anti-trust should be taken against killing/buying your competition when it's still in the womb, see Instagram-v-Facebook, WhatsApp-v-Facebook, InstagramStories-v-snapchat
- brucehoult 5y agoIt's ridiculous to compare RISC-V against x86 as serious competitors in the same market. Shipping RISC-V chips are currently about 25 years behind x86 in microarchitecture (similar to Pentium) and 20 years behind in performance due to using more modern process nodes and higher MHz. Similarly, shipping RISC-V chips are currently six years behind ARM's A53. The P550 closes the gap to ARM to 4 years, and to Intel probably about 12-15 years with P550 and A15 both most similar to Core 2 in the Intel line-up. That's a highly-usable level of performance, especially when paired with more modern RAM, SSD, and GPUs than were available in Core 2 systems.
- brucehoult 5y agoI'm genuinely puzzled as to whether this absolutely factual comment was downvoted by RISC-V haters or RISC-V fanboys lol.
- zsmi 5y agoIt's for sure an interesting result but honestly, perf/freq is yesterday's spec. What matters in 2021 is perf/W and perf/$ and there is no information on either of those metrics.
- LargoLasskhyfv 5y agoWhat about perf/degree of safety?
- kragen 5y agoCan I interest you in a nice Hercules Cortex-R?
- Throwawayaerlei 5y agoYou can until I look at the errata pages. Emphasis multiple pages.
- plantsbeans 5y agoThey mention “performance/area” as being dramatically better than Cortex-A75. I’m not familiar with whether area is expected to relate to power usage.
- zsmi 5y agoperf/area comes with a huge number of caveats and it basically doesn't mean anything as given. For example, the exact same verilog, on the same process node at the same foundry, can synthesize to very different areas depending on the standard library used. They come in a lot of varieties with a lot of different trade offs. For even more detail, the SkyWater130 node, which has been popular on HN lately and is public so we can actually post links to it, has 6 different mappings that are possible. Note, some are called high speed, or high density, etc. You get the idea. https://skywater-pdk.readthedocs.io/en/latest/contents/libraries/foundry-provided.html https://skywater-pdk.readthedocs.io/en/latest/contents/libra...
- 5y ago
- nickik 5y agoGo work with System76 and get me a RISC-V RV64GCV Laptop. That would be awesome.
- xvilka 5y agoAnd a tablet computer.
- rwmj 5y agoAllWinner will likely deliver one of those in the near future.
- eric__cartman 5y agoIf they do I hope those chips get better mainline Linux kernel support than the ARM based ones. The work the Armbian devs are doing is amazing, but they are still missing drivers from the manufacturer. Mainly for proper graphics and video encoding/decoding. The only operating system where this works well is in Android with an archaic kernel.
- FullyFunctional 5y agoThe CPU support is already pretty good and for example Huawei is pushing important Linux kernel patches. What you are talking about is drivers for peripherals, which is are SoC-level issues, and really up to the partners (like Allwinner, SiPeed, etc). So far documentation is the most critical part and it's a very mixed bag. I think this will be much like the Arm experience, albeit everyone is at least using device trees these days.
- FullyFunctional 5y agoI have a C906 and while it's fun, it's very very slow by 2021 standards: single core, scalar in-order @ 1.0 GHz with no L2$. The upcoming BeagleV is a lot faster (I have the beta): quad core, dual issue in-order @1.5 GHz (TBD) with 2 MiB L2. I'm expecting (guessing) that the triple-issue OoO P550 would be 5-10X faster at iso-frequency, but if history repeats it'll be four+ years before we see it in silicon for sale.
- zozbot234 5y agoThe press release mentions that this is a triple-issue OOO design. Probably based on BOOM v3/SonicBOOM architecture[0], given what we know of previous SiFive designs. [0] https://github.com/riscv-boom/riscv-boom https://github.com/riscv-boom/riscv-boom
- FullyFunctional 5y agoFrom the press release: "Evolved from the previously announced SiFive U84 microarchitecture," The U84 was a from scratch, in-house design.
- truncate 5y agoHow does RISC-V places itself in market? What would be the advantage of going RISC over let say ARM (or x86)?
- MangoCoffee 5y agoas backup incase Nvidia manage to buy ARM and squeeze all the fabless companies
- CameronNemo 5y agoAnd what if Intel buys SiFive and we are back to stunted RISC-V cores?
- MangoCoffee 5y agois RISC-V a closed platform like ARM? is RISC-V an open source platform or not? what does Intel buying SiFive gotta do with RISC-V?
- CameronNemo 5y agoRISC-V is not closed, but the best RISC-V cores are. If Intel buys RISC-V, the entire ecosystem could be set back.
- dkjaudyeqooe 5y agoMaybe, but others will also offer high-performance cores since it's an open spec and there are no licencing barriers to doing so.
- CameronNemo 5y agoI do hope so. The Xuantie cores are not yet comparable AFAICT.
- hajile 5y ago
- marcodiego 5y ago> said Amber Huffman, Intel Fellow and CTO of IP engineering group at Intel. Hope intel doesn't infect it with IME.
- kragen 5y agoYeah, that's a very serious concern.
- MaxBarraclough 5y agoThe existence of a RISC-V core with a management engine wouldn't preclude the existence of RISC-V cores without management engines.
- ch_123 5y agoI hope they release an update of the "Unmatched" motherboard with one of these chips. I'm reluctant to spend ~$700 on a platform which uses in-order cores which are presumably designed for low-power devices. (Yes, I appreciate I may not be the intended audience for that board, but I would still like to build a RISC-V based desktop one of these years)
- JensensStapler 5y agoThe P550 core in the title is actually a 3 way issue OOO core with near A76 performance, but fair point on the dev boards. Hopefully Intel's dev board or some alternative will provide a lower cost option.
- drmpeg 5y agoYou wouldn't be happy with the Unmatched. At 1.2 GHz, it's slower than a Rpi4. Even a Beagleboard-X15 (2 core armv7) is faster.
- brucehoult 5y agoWell, naturally. The Pi 4's A72 cores are much more sophisticated than the cores in the Unmatched. Comparing it against A53 or A55 boards (Pi 3, Odroid C2 or C4) is more appropriate. You don't buy a HiFive Unmatched because it's faster or cheaper than an ARM-based board. It's obviously not. You buy a HiFive Unmatched because you specifically want to run or create RISC-V software because you believe that will be important in the future and the Unmatched is currently the highest performance way to do that, certainly for single-threaded code or for running a full desktop OS with accelerated GUI. You get get more overall multi-threaded RISC-V performance running QEMU on an x86 machine with 8+ cores. That's probably going to cost more. But you might already have one that's not heavily used.
- chem83 5y agoThe following is speculation on my part, so I'm inviting discussion. To some extent it feels SiFive is trying to turn RISC-V into ARM by locking it up in patents while at the same time holding the keys to the ratification of the various extensions, some of which (H-extensions being good example[1]) have been stuck without much development, slowing down sw support and making it difficult to upstream[2] what has been developed so far. Meanwhile, WorldGuard is available and perhaps thriving as closed, commercial IP. It feels like there could be some conflicts of interest there and, honestly, if Intel bought SiFive, it would at least make those intentions blatantly obvious. [1] https://lwn.net/ml/linux-kernel/CAAhSdy0F7gisk=FZXN7jmqFLVB3456WunwVXhkrnvNuWtrhWWA@mail.gmail.com/ https://lwn.net/ml/linux-kernel/CAAhSdy0F7gisk=FZXN7jmqFLVB3... [2] https://lists.riscv.org/g/tech-privileged/topic/risc_v_h_extension_freeze/80346318?p=,,,20,0,0,0::recentpostdate%2Fsticky,,,20,2,0,80346318 https://lists.riscv.org/g/tech-privileged/topic/risc_v_h_ext...
- zozbot234 5y agoIIRC, H extension was set aside because much of the desiderata for H could be achieved more simply by reusing the S (supervisor mode) extension.
- chem83 5y agoDo you happen to have a link to this discussion? I couldn't find anything associated with the spec commits on [1]. One of the aspects folks were looking forward to seeing is the specification of the 2-stage IOMMU, which S-mode or other parts of the spec don't address per the lengthy discussion on [2]. Thanks. [1] https://github.com/riscv/riscv-isa-manual/commits/master/src/hypervisor.tex https://github.com/riscv/riscv-isa-manual/commits/master/src... [2] https://arxiv.org/pdf/2103.14951.pdf https://arxiv.org/pdf/2103.14951.pdf
- nickik 5y agoThe H-Mode has been removed, but people usually still call it the H extension.
- 5y ago
- nullc 5y agoNothing with bitmanip yet? :(
- brucehoult 5y agoBitManip is currently frozen and in the 45 day Public Comment period before ratification. Expect chips in 9 to 12 months, minimum.