4 ms·

It's very easy to understand. It's a specialised and expensive instruction in gates and gate delays (quite possibly being the limiting factor on clock speed if

It's very easy to understand. It's a specialised and expensive instruction in gates and gate delays (quite possibly being the limiting factor on clock speed if you try to do it in one cycle), there is very little software that would benefit meaningfully from it, and RISC-V was not design to sell computers to the NSA. The Zbc BitManip extension contains popcount (and also count leading and trailing zeros) and will be ratified before the end of summer.

ncmncm 5y ago
What you mean to say is that you do not personally understand the myriad uses where it makes an order of magnitude difference in performance. The "NSA" myth is long past its sell-by date. It is rare for popcount to complete in one cycle on other systems, and so it is mystifying that you would even bring it up. Other core operations take more than one cycle.
- avianes 5y ago
  > What you mean to say is that you do not personally understand the myriad uses where it makes an order of magnitude difference in performance You clearly misunderstand the concept of a modular ISA. RISC-V does not only target high performance. It targets simple scalar microcontrollers, general purpose superscalar machines, and specialized acceleration (Except specific encoding like VLIW for now). Each of these domains needs a slightly different ISA, and a modular ISA like RISC-V can aggregate all this by providing several ISA extensions. Then, for each domain, we must select an appropriate set of extensions. And bitmanip is not necessary for all domains.