And for FPGA stuff intersecting with RISC-V: @jangray @BrunoLevy01 @OlofKindgren @mithro @iamtommythorn @YosysHQ @oe1cxw @wavedrom @bunniestudios There is ple

And for FPGA stuff intersecting with RISC-V: @jangray @BrunoLevy01 @OlofKindgren @mithro @iamtommythorn @YosysHQ @oe1cxw @wavedrom @bunniestudios There is plenty of quality content on Twitter, and it's easy to avoid the drama llamas.