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Using a Precursor [1] seems like it might be useful here, since you can compile and verify your own CPU on an FPGA. But then it comes down to whether the FPGA s
by xvector 5y ago
Using a Precursor [1] seems like it might be useful here, since you can compile and verify your own CPU on an FPGA. But then it comes down to whether the FPGA software can understand and intercept what you're compiling, I suppose.
[1]: https://www.crowdsupply.com/sutajio-kosagi/precursor https://www.crowdsupply.com/sutajio-kosagi/precursor
- andrewflnr 5y agoThat requires the FPGA software to not only solve the halting problem fast enough that you don't notice the lag, but invent backdoor code for arbitrary made up CPU architectures. Even if it was connecting to a godlike AGI in the cloud, I doubt it could pull this off reliably.
- xvector 5y agoIn reality, it only requires the FPGA software to backdoor the most commonly used random number generator constructions found in open-source projects based off of the Precursor. Writing such a backdoor would probably take a developer about a single day.