Does it really spin up a big core? AFAIK different C-states dictate that per-core and different caches power on. Given that, surely this can be extended furth

Does it really spin up a big core? AFAIK different C-states dictate that per-core and different caches power on. Given that, surely this can be extended further with ALUs, FPUs etc only being powered on as necessary? I assume that is already the case no? Or is this more towards having smaller denser cores with fewer interconnects and components for even higher power efficiency?