3 ms·
Your parent post didn't imply that one can reorder loads/stores in a way that breaks the abstract machine on a single core. Load/store ordering is generally a m
by ghusbands 5y ago
Your parent post didn't imply that one can reorder loads/stores in a way that breaks the abstract machine on a single core. Load/store ordering is generally a multi-core concern.
The x86 memory model is widely known to be stricter than that chosen by default for most other CPUs. It's for that reason that Apple's X1 had to introduce total store ordering for x86 emulation at speed.
- gpderetta 5y agoI read the parent as a comment on the article that discusses the machinery that allows reordering of potentially aliasing operations. If that's not the case, I'm not sure how their comment is relevant. I'll also just note that Intel actually slightly strengthened the documented MM in recent year from Processor Ordering to Total Store Order which formally forbids IRIW that never happened in practice.