4 ms·
I think yields are ~100% actually, I've read the chip is architected in a way that if any of those cores doesn't work the rest of the chip still works.
by fabiospampinato 5y ago
I think yields are ~100% actually, I've read the chip is architected in a way that if any of those cores doesn't work the rest of the chip still works.
- EvanAnderson 5y agoI figured there would be spare silicon on the die. I guess I was thinking more about the raw yields and how much over-capacity was engineered into the product to handle real-world physics. There has to be some pretty impressive engineering behind this thing.
- kasperni 5y ago1-2% over-capacity. ""Both Cerebras’ first and second generation chips are created by removing the largest possible square from a 300 mm wafer to create 46,000 square millimeter chips roughly the size of a dinner plate. An array of repeated identical tiles (84 of them) is built into the wafer, enabling redundancy.""
- EvanAnderson 5y agoThey're fabbing it at a 7nm process, too! This is really exciting stuff. This rabbit hole got me to this Anandtech article: https://www.anandtech.com/show/16626/cerebras-unveils-wafer-scale-engine-two-wse2-26-trillion-transistors-100-yield https://www.anandtech.com/show/16626/cerebras-unveils-wafer-...