4 ms·
That’s called dual core lockstep and it’s very common in automotive and other applications where reliability is paramount.
by smallpipe 5y ago
That’s called dual core lockstep and it’s very common in automotive and other applications where reliability is paramount.
- dataflow 5y agoYeah I didn't know! And I just realized this is mentioned in the paper just a little further below where I paused. It seems like it would significantly affect anything shared (like L3 cache)... would Intel and AMD have appetite for adding this kind of thing to x86?
- yaantc 5y agoThe pair in lockstep is "close", in that it only includes the core and deterministic private resources like core private caches. Shared resources like a L3 cache are outside of the whole pair, and can be seen as accessed by the pair. All output is from the pair and checked for consistency (same for both cores in lockstep) before going out. Not directly related but some platforms supporting lockstep are flexible: you can use a pair as either 2 cores (perf) or a single logical one (lockstep).