3 ms·
Yes, it would certainly be slower than an on-die cache, but very cheap. They can seriously reduce the L3 cache area, which is like 50% of the die currently, or
by baybal2 5y ago
Yes, it would certainly be slower than an on-die cache, but very cheap.
They can seriously reduce the L3 cache area, which is like 50% of the die currently, or get rid of it alltogether.
Imagine, 2 times more dies per wafer at near no cost except for extra packaging.
- fomine3 5y agoSeparating SRAM cache would improve chip yield so possibly decrease some cost, but I don't believe it make SRAM "very cheap" or "at near no cost".
- baybal2 5y agoSee how the defect rate work: If a particle kills a repairable part of the die (which can be downgraded, or cut-off) you still get from a quarter, to a half of die area dead, and a second grade chip. But if you can make 2x dies from wafer even with the same defect rate (it will usually be less.) Even if the die will completely die from a local defect, you still get much more perfect dies in total, which is more important for your bottom line. Standalone SRAM can be very repairable, and high yield with a custom process. Adding few spare columns, or SRAM banks should be covering for much more defects than if binning was done per entire CPU die.
- kingosticks 5y agoThis. A great way to reduce the cost of your chip is to add SRAM to it. I'm not joking.