> But it is rather redundant to say vhdl and softcore I disagree. Firstly, there are many other hardware description languages (Verilog, migen, SpinalHDL for i

> But it is rather redundant to say vhdl and softcore I disagree. Firstly, there are many other hardware description languages (Verilog, migen, SpinalHDL for instance), and while they can more or less interoperate, one could prefer a given language depending on the context. Secondly, vhdl can be synthesized, placed and routed as an ASIC "hard core" or more precisely "soft macro". Yeah, you are right, I don't know of any FPGA (yet) shipping with hard RISC-V cores.