6 ms·
Build a RISC-V CPU from scratch
- valleyer 5y agoThis page (linked from the IEEE article) actually has a picture of the thing: https://hackaday.io/project/178826-pineapple-one https://hackaday.io/project/178826-pineapple-one
- spuz 5y agoVery impressive especially considering Filip is only 19 and this was his first project using custom PCBs. I'd love to know how he discovered and solved the timing bug.
- tyingq 5y ago"It uses over 230 integrated circuits, mostly from the 74HCT series of logic chips" That's actually an impressively low number of 74xxx chips given that it's a "real" 32 bit CPU. Ben Eater's "8 bit CPU from TTL" kit has ~43 74xxx chips.
- cmrdporcupine 5y agoI would love to have a utility which could convert an arbitrary Verilog module into its equivalent in a series of 74 series chips.
- mhh__ 5y agoIt's been done before (http://pepijndevos.nl/2019/07/18/vhdl-to-pcb.html http://pepijndevos.nl/2019/07/18/vhdl-to-pcb.html see also Hackaday), but not exactly a standard use of yosys.
- cmrdporcupine 5y agoOh, that's awesome.
- userbinator 5y agoThe first VAX was also made from TTL - I'm not sure how many chips exactly (enough to fill a relatively large cabinet), but that's also a fully-featured 32-bit CPU.
- tyingq 5y agoA picture of said cabinet, which is supposedly 4 feet wide, and all the cpu boards mounted vertically occupy a pretty wide swath of that. I think it's safe to assume it's more than 230 TTL chips. https://rcsri.org/collection/vax-11-785/ https://rcsri.org/collection/vax-11-785/
- Taniwha 5y agomakes heavy use of 74181 4-bit slices - remember it's from a different age, very CISC, lots of microcode
- kjs3 5y agoLots of us built what you would call a RISC processor out of 74181/Am2901 bit-sliced processors back in the day. Mostly because we didn't have the microcode skills to do what the pros did on things like the VAX or DGs.
- erosenbe0 5y agoWell it is apples to oranges. In the late 70s, high-end RAM was maybe 250ns, so you wanted a 5mhz CPU. In order to clock that on the VAX, they implemented numerous smaller micro operations and associated specialized TTL and then used microcode. So this limited the maximum propagation delay possible for any single cycle micro-op at the expense of complexity and power. Then each macro sizsd op took variable cycles. Also, the VAX had 4 priv states, ecc capable dram controller, i/o, fault recovery and the like.
- kjs3 5y agoI was an admin on a VAX-11/780, the first generation, in the Before Times. Yeah, the basic CPU was 26 or so hex-width Unibus boards about 16"x9". Memory and I/O was extra. A lot more than 230 TTL chips. They eventually boiled it down to a couple of ASICs so you had a VAX on a single card. But to be fair, the VAX implemented a vast amount of stuff that you wouldn't if you were designing your own TTL CPU.
- londons_explore 5y agoThe memory chips can be abused as big lookup tables, condensing potentially hundreds of discrete logic gates into one chip.
- zozbot234 5y agoThat's pretty much how all programmable gate logic works.
- loup-vaillant 5y agoNo, they're a bit different. If you take a look at GAL22V10 (or its replacement ATF22V10¹), you can see from the functional diagram that with a sensible organisation, you need way less memory than would be required from a giant look up table. The tradeoffs are very different: with a giant look up table, you can encode any operation with the device. The problem is the rather huge amount of memory you need (with two 8-bit inputs and one 8-bits outputs you need 64KiB of internal memory to account for all possible inputs). With a PAL/GAL like the ATF22V10, you are fairly limited (your operation must be expressible in normal form, and it will have a limited number of terms), but the number of fuses (or memory cells) required to encode this are much, much lower. Personally, I feel like using actual memory to encode behaviour is a bit "cheating" (that's just my own aesthetics). I would totally do this for actual micro-code, but for an ALU this seems wasteful. [1]: https://ww1.microchip.com/downloads/en/DeviceDoc/doc0735.pdf https://ww1.microchip.com/downloads/en/DeviceDoc/doc0735.pdf
- dfox 5y agoGALs are in essence ROM with both "halves" programmable (as the address decoding logic can also be implemented by mask or fuse programmable bit array). The end result is that you trade bit of generallity for smaller, cheaper and faster device. Modern FPGAs (and IIRC even many CPLDs, as the line got somewhat blurred) are usually implemented as array of LUTs implemented as normal memory with fixed address decode and not with this PLA/PAL/GAL trick. Hence, "programmable logic is just bunch of ROMs". Of interesting historical note is Connection Machine, which while marketed as "computer", is essentially an FPGA stood on it's head. Each of the thousands of CPUs is in essence FPGA LUT block, whose configuration changes for each microinstruction, while routing is fixed.
- coupdejarnac 5y agoThere are a bunch of fun discrete logic computers on Hackaday, if anyone is interested. This one looks nice: https://hackaday.com/2019/06/23/a-ttl-cpu-minimising-its-chip-count/ https://hackaday.com/2019/06/23/a-ttl-cpu-minimising-its-chi...
- justinclift 5y agoVery cool. Out of curiosity, wonder how much power it uses while running? :)
- flakiness 5y agoThe author talks about "Computer Organization and Design, RISC-V Edition". Is the book worth a read even if one read the other (and older) edition of the Patterson book? Can I sufficently learn RISC-V from it, or is it used as mere "reference" architecture?
- mhh__ 5y agoYou could skim a PDF of it +7$5 to get up to scratch with RISC-V, and it is more of a reference. FWIW I think H&P books are extremely important references but basically rubbish pedagogically.
- rwmj 5y agoIt's the main textbook used in university courses on microprocessor design and microarchitecture, so quite useful pedagogically. While you will certainly learn a lot and have a lot of fun by creating your own CPU out of 74-serial chips, this is no way to design a high performance, modern CPU. For that you need to understand the math, trade-offs, and sophisticated dataflow techniques which the book will teach you. (And then you'll need to spend years at one of the big design houses to learn the stuff that no one teaches)
- mhh__ 5y agoBut I think it's a poorly written book. Ignoring the issues with it like that the appendixes have to found online even after buying the book (i.e. not on the website), it simply doesn't teach very effectively
- zozbot234 5y agoCO&D is a textbook about computer architecture in general, and only tangentially about RISC-V. There are better reference manuals to learn about RISC-V itself.
- Tabular-Iceberg 5y agoThis seems to be the only viable option if you want some certainty of not being spied on through a hardware back door, rather than modern chips where you're pretty much a guest on some kind of mysterious hypervisor. I wonder what the theoretical limits to performance and usability of a 74xxx computer is. Email and chat should be possible as they were on 74xxx machines in the past, maybe even Gopher-style web browsing. But it's a hard sell when everyone's hooked on HD or even 4K video streaming.
- guerrilla 5y agoAs far as switching frequencies, see: https://electronics.stackexchange.com/questions/260477/why-dont-we-see-faster-7400-series-chips https://electronics.stackexchange.com/questions/260477/why-d...
- moring 5y agoWhy would an FPGA-based computer be ruled out as an option?
- Tabular-Iceberg 5y agoEverything VLSI is going to be pretty opaque. Is there at least an FPGA with a completely open bitstream specification yet?
- 70rd 5y agoThey're working on it for the Xilinx 7-series. https://symbiflow.github.io/ https://symbiflow.github.io/
- AndresNavarro 5y agoActually more than one, and new projects are started everyday to RE more architectures as we gathertools and knowledge from previous efforts. While the newer higher end fpgas are still out of reach a Lattice ECP5 can do pciE, gigabit ethernet, hdmi, ddr3, usb3, and of course has more than enough for a RISC-V (as a matter of fact you can fo one in a much cheaper/smaller ice40: https://github.com/cliffordwolf/picorv32 https://github.com/cliffordwolf/picorv32