3 ms·
Maybe but O(n) on a complex decoder could be a material penalty vs a much simpler design.
by klelatti 5y ago
Maybe but O(n) on a complex decoder could be a material penalty vs a much simpler design.
- dragontamer 5y agoSure, but only within a constant factor. My point is that the ARM's ISA vs x86 ISA is not any kind of asymptotic difference in efficiency that grossly prevents scaling. Even the simplest decoder on a exactly 32-bit ISA (like POWER9) with no frills would need O(n) scaling. If you do 16-instructions per clock tick, you need 16x individual decoders on every 4-bytes. Sure, that delivers the results in O(1) instead of O(log(n)) like a Kogge-stone FSM would do, but ARM64 isn't exactly cake to decode either. There's microop / macro-op fusion going on in ARM64 (ex: AESE + AESMC are fused on ARM64 and executed as one uop).