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This is the most exciting part for me: Its going to have A LOT of memory bandwidth, as the article states they will have DDR5 and HBM2E. I think DDR5 should n
by drewg123 5y ago
This is the most exciting part for me: Its going to have A LOT of memory bandwidth, as the article states they will have DDR5 and HBM2E. I think DDR5 should nearly double throughput over DDR4, and HBM2E supposedly is good for 410GB/sec of memory bandwidth [1]
This should give more than enough memory bandwidth to double the number of cores.
I'm personally excited by the memory bandwidth and PCIe Gen5 more than the number of cores. I'm hoping we can build a single socket 800Gb/s Netflix OCA :)
[1] https://www.tomshardware.com/reviews/glossary-hbm-hbm2-high-bandwidth-memory-definition,5889.html https://www.tomshardware.com/reviews/glossary-hbm-hbm2-high-...
- twic 5y agoAh, thanks, i completely overlooked that mention of HBM2E. So one stack of HBM2E can hold 24 GB, accessed at 410 GB/s. And we can have multiple stacks per package - i see lots of diagrams with four stacks. So a plausible scenario is 80 cores with 96 GB and 1640 GB/s of HBM2E. Per core, that's 1.2 GB and 20.5 GB/s. That's ~320 million cache line fills per second. If the clock speed is 4.6 GHz, that's a cache line fill every 15 cycles, or a 64-bit load every 1.8 cycles. That seems pretty good!