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The diameter of an atom is between 0.1 to 0.5 nanometers. Does it mean when the researchers build a 0.1nm scale we can't expect to have any more improvements i

The diameter of an atom is between 0.1 to 0.5 nanometers. Does it mean when the researchers build a 0.1nm scale we can't expect to have any more improvements in chip production?

dogma1138 5y ago
No, since while the size of atoms already comes into play with modern lithography and has been for a while the 1nm is just an arbitrary number. No feature size is really 1nm in any dimension probably not even close. The definition is more or less arbitrary, TSMC could have released a statement that they made a breakthrough in 1574 Zorks Chip Production and it would be just as true. The only thing that really matters here are the actual characteristics of the node in terms of power and density both on their own and in comparison to previous TSMC nodes and competing nodes. It seems that with this specifically the focus was to create as thin layers as possible. Weird shit begins to happen when you have “extreme” geometries or topologies e.g. graphene that has some unique properties when it comes to electrical conductivity due to how electrons move within the lattice. So it seems that the aim here is to exploit similar effects.
- somedude895 5y ago
  So what does the 1nm refer to? Is it just a marketing term for an improvement of x from 4nm?
  - adrian_b 5y ago
    Precisely that. In the beginning, for every doubling of the transistor density, regardless how that was achieved, the marketing size number was divided by about sqrt(2). More recently the relationship between the density improvement ratio and the marketing size seems to be even less quantitative. So they might claim that their process is 4 times denser than in the recent IBM announcement or maybe that it is just twice denser, if they have divided 2 nm from IBM by 1.4 and they have rounded to 1 nm. Similarly, the IBM "2 nm" announcement was probably intended to claim that it is twice denser than the older announcement of the "3 nm" TSMC process.
- baybal2 5y ago
  A MoS2 monolayer may well be 1nm
mhh__ 5y ago
The actual feature size in the chip leaves something like 1000x scaling in volume from what I remember from Jim Keller's talk about it. Moore's law is dead but scaling is not.
adrian_b 5y ago
For now, the minimum sizes defined by lithography are in the 20 nm ... 50 nm range, so they correspond with 50 ... 100 lattice cells. Also, 0.5 nm for silicon is not the size of an atom, but the length of the edge of a cube with 8 atoms (4 internal atoms, 6x0.5 = 3 atoms on the faces and 8x0.125 = 1 atom in the cube corners). Nevertheless, there are some very thin layers with a thickness comparable to 1 nm, so corresponding to a small number of atomic layers. Obviously, it is very difficult to grow such thin layers without holes and without variations in thickness.

The diameter of an atom is between 0.1 to 0.5 nanometers. Does it mean when the researchers build a 0.1nm scale we can't expect to have any more improvements in chip production?

dogma1138 5y ago

No, since while the size of atoms already comes into play with modern lithography and has been for a while the 1nm is just an arbitrary number. No feature size is really 1nm in any dimension probably not even close. The definition is more or less arbitrary, TSMC could have released a statement that they made a breakthrough in 1574 Zorks Chip Production and it would be just as true. The only thing that really matters here are the actual characteristics of the node in terms of power and density both on their own and in comparison to previous TSMC nodes and competing nodes. It seems that with this specifically the focus was to create as thin layers as possible. Weird shit begins to happen when you have “extreme” geometries or topologies e.g. graphene that has some unique properties when it comes to electrical conductivity due to how electrons move within the lattice. So it seems that the aim here is to exploit similar effects.

somedude895 5y ago
So what does the 1nm refer to? Is it just a marketing term for an improvement of x from 4nm?
- adrian_b 5y ago
  Precisely that. In the beginning, for every doubling of the transistor density, regardless how that was achieved, the marketing size number was divided by about sqrt(2). More recently the relationship between the density improvement ratio and the marketing size seems to be even less quantitative. So they might claim that their process is 4 times denser than in the recent IBM announcement or maybe that it is just twice denser, if they have divided 2 nm from IBM by 1.4 and they have rounded to 1 nm. Similarly, the IBM "2 nm" announcement was probably intended to claim that it is twice denser than the older announcement of the "3 nm" TSMC process.
baybal2 5y ago
A MoS2 monolayer may well be 1nm

mhh__ 5y ago

The actual feature size in the chip leaves something like 1000x scaling in volume from what I remember from Jim Keller's talk about it. Moore's law is dead but scaling is not.

adrian_b 5y ago

For now, the minimum sizes defined by lithography are in the 20 nm ... 50 nm range, so they correspond with 50 ... 100 lattice cells. Also, 0.5 nm for silicon is not the size of an atom, but the length of the edge of a cube with 8 atoms (4 internal atoms, 6x0.5 = 3 atoms on the faces and 8x0.125 = 1 atom in the cube corners). Nevertheless, there are some very thin layers with a thickness comparable to 1 nm, so corresponding to a small number of atomic layers. Obviously, it is very difficult to grow such thin layers without holes and without variations in thickness.