The general rule of thumb for reasonably sized cores, which both Apple's performance and efficiency cores are, is that performance tends to scale with the squar

The general rule of thumb for reasonably sized cores, which both Apple's performance and efficiency cores are, is that performance tends to scale with the square of the transistor and energy budget due to N^2 structures like the bypass network, ROB, etc being the long poles. Now, for any given transistor budget there's going to be a non-linear tradeoff between performance and power governed by supply voltage versus process threshold voltage. And if you're testing a chip and using only one or the other of the two sorts of cores you're paying for the uncore and memory subsystem regardless of which cores you're testing which complicates things. But it would be really weird if power consumption wasn't super linear with performance, that's why "efficiency cores" have "efficiency" in their name.