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No, it's certainly hard to write a multithreaded program that scales up to 32 cores. But it's also hard to write a multithreaded program that scales up to 8 co

No, it's certainly hard to write a multithreaded program that scales up to 32 cores. But it's also hard to write a multithreaded program that scales up to 8 cores. I'm saying that if we exclude the multithreaded programs that don't scale to 8 cores, most of them can be made to scale to 32 cores with reasonable effort.

jeffbee 5y ago
I don’t really agree. You can get cpus where eight cores share an l2 cache and you can pretty much obliviously program those and get totally reasonable scaling because the contention penalty is the L2 access latency. There are no 32-core parts with that property, so you’re paying for at best L3 access latency and maybe main memory, possibly even NUMA node-crossing latency.
- Symmetry 5y ago
  Are there CPU architectures where 8 cores share a L2 cache? I'm not aware of any though I can think of several where 4 cores share a L2 cache, though those tend to be pretty lightweight cores. More often you see issues with the L3 cache being shared between 8 cores or no as with Zen 2 versus Zen 3. And since only lightweight cores tend to share L2s this isn't really an issue in terms of replacing heavyweight cores with lightweight ones. Mostly, though when I think about sharing data between 8 cores I tend to be concentrating on making sure it ends up as S in MESI, MOESI, MESIF or whatever cache coherency protocol the chip is using.
  - jeffbee 5y ago
    Sure, POWER9 offers pairs of SMT8 cores sharing L2 caches, that's 16 thread contexts presented to software that are all sharing an L2 cache domain. Intel "Tremont" Atom has a shared L2 cache for a module of up to 4 cores. Maybe that is the one you allude to as lightweight.
    - Symmetry 5y ago
      Yes, there are clearly architectures where 8 threads share a L2$. L1$ too in both recent POWER SMT8 cores and SPARC Niagras. Yes, Intel Atoms were one of the examples I was thinking of regarding 4 cores sharing an L2$. One can quibble about what counts as a "core" when you're talking about POWER9 or Bulldozers but even being generous I don't think there's ever been a design where 8 cores all share the same L2$.

jeffbee 5y ago

I don’t really agree. You can get cpus where eight cores share an l2 cache and you can pretty much obliviously program those and get totally reasonable scaling because the contention penalty is the L2 access latency. There are no 32-core parts with that property, so you’re paying for at best L3 access latency and maybe main memory, possibly even NUMA node-crossing latency.

Symmetry 5y ago
Are there CPU architectures where 8 cores share a L2 cache? I'm not aware of any though I can think of several where 4 cores share a L2 cache, though those tend to be pretty lightweight cores. More often you see issues with the L3 cache being shared between 8 cores or no as with Zen 2 versus Zen 3. And since only lightweight cores tend to share L2s this isn't really an issue in terms of replacing heavyweight cores with lightweight ones. Mostly, though when I think about sharing data between 8 cores I tend to be concentrating on making sure it ends up as S in MESI, MOESI, MESIF or whatever cache coherency protocol the chip is using.
- jeffbee 5y ago
  Sure, POWER9 offers pairs of SMT8 cores sharing L2 caches, that's 16 thread contexts presented to software that are all sharing an L2 cache domain. Intel "Tremont" Atom has a shared L2 cache for a module of up to 4 cores. Maybe that is the one you allude to as lightweight.
  - Symmetry 5y ago
    Yes, there are clearly architectures where 8 threads share a L2$. L1$ too in both recent POWER SMT8 cores and SPARC Niagras. Yes, Intel Atoms were one of the examples I was thinking of regarding 4 cores sharing an L2$. One can quibble about what counts as a "core" when you're talking about POWER9 or Bulldozers but even being generous I don't think there's ever been a design where 8 cores all share the same L2$.