Consuming 1/10 as much power would also have thermal advantages for the die overall, and segregating them onto a separate L2 cache from the performance cores wo

Consuming 1/10 as much power would also have thermal advantages for the die overall, and segregating them onto a separate L2 cache from the performance cores would help with that cache friendliness situation, different allocations of logic units means you can tailor them toward different kinds of workloads. . . I'm no CPU designer, so I really can't speak with authority here, but I can at least see several possible reasons why it would make sense even when you aren't worried about battery life.