3 ms·

Will TSMC 3nm be the second die shrink in a row where Apple does the unconventional thing and takes a reduction in power/heat instead of a performance increase?

Will TSMC 3nm be the second die shrink in a row where Apple does the unconventional thing and takes a reduction in power/heat instead of a performance increase? >Compared to it’s N5 node, N3 promises to improve performance by 10-15% at the same power levels, or reduce power by 25-30% at the same transistor speeds. https://www.anandtech.com/show/16024/tsmc-details-3nm-process-technology-details-full-node-scaling-for-2h22 https://www.anandtech.com/show/16024/tsmc-details-3nm-proces... It would certainly help pack that many cores into a small space without throttling.

martinald 5y ago
Considering M1 only uses 20W max, you could add a lot of cores without any efficency savings and still be within the current Xeon 200W TDP envolope. Indeed 8 M1s to make 32perf/32efficency would only be 160W. I'm aware this is very rough, but I also imagine even 8 M1s are a fraction of the cost of one Intel Xeon W chip, so much more margin for Apple. Not good times for Intel.
- hajile 5y ago
  Cores aren't the real picture here. AMD's high-end cores have a quarter-gig of cache. That uses a lot of power no matter how you slice it. AMD's Infinity Fabric interconnect uses 30-50% of total chip power. Apple will have similar communications overhead too. Adding more memory lanes increases power consumption as does adding more PCIe lanes and other IO. It definitely remains to be seen if their chips are significantly faster when scaled up. In any case, they wouldn't have to beat AMD or Intel to count it as a success. Simply not being terrible would be enough.
  - cma 5y ago
    > AMD's Infinity Fabric interconnect uses 30-50% of total chip power. It would use less if it was on the same process node as the rest of stuff though. They were fulfilling some obligation to Global Foundries by having them separately manufacture it.
- GeekyBear 5y ago
  >still be within the current Xeon 200W TDP envolope Apple needs very high performance core designs that also work in the thermal envelope of a handheld phone or a fanless laptop. As noted when the A14 launched, taking the power/heat cut at the 7nm node change resulted in better sustained performance for those chips >The one explanation and theory I have is that Apple might have finally pulled back on their excessive peak power draw at the maximum performance states of the CPUs and GPUs, and thus peak performance wouldn’t have seen such a large jump this generation, but favour more sustainable thermal figures. https://www.anandtech.com/show/16088/apple-announces-5nm-a14-soc-meagre-upgrades-or-less-power-hungry https://www.anandtech.com/show/16088/apple-announces-5nm-a14...
- _ph_ 5y ago
  And I would assume that the GPU, which needs to be grown considerably too, might be on a second package, so the 8 M1s without GPUs would use less than 100W.
ksec 5y ago
Well, 3nm is 2022, so the newer M variant in this article wont be using it.

martinald 5y ago

Considering M1 only uses 20W max, you could add a lot of cores without any efficency savings and still be within the current Xeon 200W TDP envolope. Indeed 8 M1s to make 32perf/32efficency would only be 160W. I'm aware this is very rough, but I also imagine even 8 M1s are a fraction of the cost of one Intel Xeon W chip, so much more margin for Apple. Not good times for Intel.

hajile 5y ago
Cores aren't the real picture here. AMD's high-end cores have a quarter-gig of cache. That uses a lot of power no matter how you slice it. AMD's Infinity Fabric interconnect uses 30-50% of total chip power. Apple will have similar communications overhead too. Adding more memory lanes increases power consumption as does adding more PCIe lanes and other IO. It definitely remains to be seen if their chips are significantly faster when scaled up. In any case, they wouldn't have to beat AMD or Intel to count it as a success. Simply not being terrible would be enough.
- cma 5y ago
  > AMD's Infinity Fabric interconnect uses 30-50% of total chip power. It would use less if it was on the same process node as the rest of stuff though. They were fulfilling some obligation to Global Foundries by having them separately manufacture it.
GeekyBear 5y ago
>still be within the current Xeon 200W TDP envolope Apple needs very high performance core designs that also work in the thermal envelope of a handheld phone or a fanless laptop. As noted when the A14 launched, taking the power/heat cut at the 7nm node change resulted in better sustained performance for those chips >The one explanation and theory I have is that Apple might have finally pulled back on their excessive peak power draw at the maximum performance states of the CPUs and GPUs, and thus peak performance wouldn’t have seen such a large jump this generation, but favour more sustainable thermal figures. https://www.anandtech.com/show/16088/apple-announces-5nm-a14-soc-meagre-upgrades-or-less-power-hungry https://www.anandtech.com/show/16088/apple-announces-5nm-a14...
_ph_ 5y ago
And I would assume that the GPU, which needs to be grown considerably too, might be on a second package, so the 8 M1s without GPUs would use less than 100W.

ksec 5y ago

Well, 3nm is 2022, so the newer M variant in this article wont be using it.