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I love these retro graphics card projects. This one is especially cool because it can do multiple standards on one card. Of course with an FPGA it is a bit hard

I love these retro graphics card projects. This one is especially cool because it can do multiple standards on one card. Of course with an FPGA it is a bit hardware heavy. On the other extreme there are projects that provide VGA output with no special hardware at all - just using timers and GPIO pins. Linus Akesson's bit-banger comes to mind, which does so with an Atmel ATtiny15. This microcontroller is - well - tiny, about so tiny: Bit banger is built around an ATtiny15 microcontroller, which runs at 1.6 MHz and has 1 kB of flash ROM and a claustrophobic 32 bytes of RAM. In fact, those 32 bytes are the CPU registers. Only the most basic AVR instructions are supported; they occupy at least two bytes each, and can obviously not be compressed since they are executing from ROM, so a maximum of 512 instructions will fit inside the chip (fewer if static data is needed). [1] Another cool project I came about recently, but haven't had time to try out, is bit banging VGA Framebuffer written in Rust. [2] [1] https://www.linusakesson.net/scene/bitbanger/index.php https://www.linusakesson.net/scene/bitbanger/index.php [2] https://github.com/thejpster/vga-framebuffer-rs https://github.com/thejpster/vga-framebuffer-rs P.S. To give a bit historic context. I remember having an electronics book with a pattern generator made with only a PIC. Must have been the late 90s, so bit banging graphics is definitely not a recent development but it is still incredible to be able to generate these signals fast enough without special hardware and only in software. EDIT: Thinking about it, I'm not sure anymore if the PIC project was VGA or PAL and I couldn't find the book quickly.

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phire 5y ago
For designs that must interface with existing hardware with precise timings, using any kind of microcontroller bitbanging often becomes unfeasible. Linus Akesson's bit-banger and craft[1] only work because they drive all the the timings, and VGA is really permissive with timings. And once you are past cheap Atmel or ARM micro-controllers, FPGA designs are often the most cost-effective. This FPGA comes in at a unit cost of just $5.12 and allows a design of just the FPGA, the SRAM and a few level shifters. Any design around a CPLD and/or raw 74 series logic would end up with a much higher BOM, and you would struggle to implement the scan-doubler functionality for 31khz output at a reasonable price point. [1] Seriously impressive, check it out: https://www.linusakesson.net/scene/craft/index.php https://www.linusakesson.net/scene/craft/index.php
- phaedrus 5y ago
  The Parallax Propeller is one microcontroller that could (in theory) work for bitbanging precise timings even when something else controls the timing. Since each task can be put on a dedicated core, you could clock-count your assembly instructions to sync up with the right time windows, and offload any variable-time tasks to a different routine on another core. The only caveat is access to the central memory store inside the microcontroller is round-robin (80MHz / 8 cores), so if the timing requirement was close to that limit (1/10MHz), you might have to do some gymnastics to make sure your routine grabs the right distribution of cores to get auspicious timing, and possibly reset and try again if that can't be achieved.
Jeema101 5y ago
No the concept is not entirely new, especially since historically, wasting CPU cycles was often cheaper than adding framebuffer RAM. The c. 1977 Atari 2600 worked in a very similar way, wasting 80+% of the CPU time just to draw the screen. That was seen as a good trade-off back then since the games were simple and not typically doing much else with those CPU cycles.
- Someone 5y ago
  I think the trade-off was more cost than “we don’t know what we would do with these cycles” (https://en.wikipedia.org/wiki/Television_Interface_Adaptor#Background https://en.wikipedia.org/wiki/Television_Interface_Adaptor#B...) If you look at https://www.jcmit.net/memoryprice.htm https://www.jcmit.net/memoryprice.htm, 1kB RAM cost about $25-$50 at the time. The Atari 2600 sold for $199. The 6502 CPU, at $25 was too expensive for that (https://en.wikipedia.org/wiki/Atari_2600#MOS_Technology_6502/6507 https://en.wikipedia.org/wiki/Atari_2600#MOS_Technology_6502...)
- jandrese 5y ago
  Of course this means the game had to be simple because there simply wasn't enough CPU time available to do anything complex.
fowl2 5y ago
Even further to that end of the spectrum is "The World's Worst Graphics Card"[1] on a breadboard with mostly discrete logic. Fascinating. [1] https://www.youtube.com/watch?v=l7rce6IQDWs&vl=en https://www.youtube.com/watch?v=l7rce6IQDWs&vl=en
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phire 5y ago

For designs that must interface with existing hardware with precise timings, using any kind of microcontroller bitbanging often becomes unfeasible. Linus Akesson's bit-banger and craft[1] only work because they drive all the the timings, and VGA is really permissive with timings. And once you are past cheap Atmel or ARM micro-controllers, FPGA designs are often the most cost-effective. This FPGA comes in at a unit cost of just $5.12 and allows a design of just the FPGA, the SRAM and a few level shifters. Any design around a CPLD and/or raw 74 series logic would end up with a much higher BOM, and you would struggle to implement the scan-doubler functionality for 31khz output at a reasonable price point. [1] Seriously impressive, check it out: https://www.linusakesson.net/scene/craft/index.php https://www.linusakesson.net/scene/craft/index.php

phaedrus 5y ago
The Parallax Propeller is one microcontroller that could (in theory) work for bitbanging precise timings even when something else controls the timing. Since each task can be put on a dedicated core, you could clock-count your assembly instructions to sync up with the right time windows, and offload any variable-time tasks to a different routine on another core. The only caveat is access to the central memory store inside the microcontroller is round-robin (80MHz / 8 cores), so if the timing requirement was close to that limit (1/10MHz), you might have to do some gymnastics to make sure your routine grabs the right distribution of cores to get auspicious timing, and possibly reset and try again if that can't be achieved.

Jeema101 5y ago

No the concept is not entirely new, especially since historically, wasting CPU cycles was often cheaper than adding framebuffer RAM. The c. 1977 Atari 2600 worked in a very similar way, wasting 80+% of the CPU time just to draw the screen. That was seen as a good trade-off back then since the games were simple and not typically doing much else with those CPU cycles.

Someone 5y ago
I think the trade-off was more cost than “we don’t know what we would do with these cycles” (https://en.wikipedia.org/wiki/Television_Interface_Adaptor#Background https://en.wikipedia.org/wiki/Television_Interface_Adaptor#B...) If you look at https://www.jcmit.net/memoryprice.htm https://www.jcmit.net/memoryprice.htm, 1kB RAM cost about $25-$50 at the time. The Atari 2600 sold for $199. The 6502 CPU, at $25 was too expensive for that (https://en.wikipedia.org/wiki/Atari_2600#MOS_Technology_6502/6507 https://en.wikipedia.org/wiki/Atari_2600#MOS_Technology_6502...)
jandrese 5y ago
Of course this means the game had to be simple because there simply wasn't enough CPU time available to do anything complex.

fowl2 5y ago

Even further to that end of the spectrum is "The World's Worst Graphics Card"[1] on a breadboard with mostly discrete logic. Fascinating. [1] https://www.youtube.com/watch?v=l7rce6IQDWs&vl=en https://www.youtube.com/watch?v=l7rce6IQDWs&vl=en

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