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One thing people don't often bring up is how great nim is for writing DSLs. DSLs really matter in the hardware and digital design space - a space that seems t

One thing people don't often bring up is how great nim is for writing DSLs. DSLs really matter in the hardware and digital design space - a space that seems to be completely devoid of innovation when it comes to tooling. A couple languages that try to bring RTL into the 21st century are nMigen-Python and Chisel-Scala. I'm currently writing an RTL in Nim. Nim's macro system allows you to do really cool things like instantiate named RTL wires and create custom operators like `:=` for Signal assignment. Really excited about tier 1 BigNum support coming soon - which will make it easier to simulate arbitrary width integer signal arithmetic.

thechao 5y ago
Do you have anything public? I’ve been following LLHD for a while; I like the idea of a shared middle end. LLHD’s front end is Verilog/VHDL which are … not great. Are you translating, or building your own sim runtime?
- BracketMaster 5y ago
  Not yet - but keep an eye out here: https://github.com/chipeleven https://github.com/chipeleven
- BracketMaster 5y ago
  Simulator is written internally in Nim. There isn't really a good FOSS IR for RTL sims on the market currently. I absolutely refuse to use MLIR or anything based on LLVM for that matter. LLVM takes up to 40 minutes to rebuild on my Apple silicon. This is completely unacceptable in terms of rapid iteration.
  - thechao 5y ago
    LLHD is greenfield code, so it’s not based on LLVM. I’m familiar with the authors both academically (15 years ago), and on an engineering level (now). I think it is definitely worth reviewing what they’re bringing to the table. Anyways, I think the RTL market is ripe for disruption. There was a lot of great language work done by, for instance, Ronald Garcia, directly aimed at fixing pain points in HDLs, like parsmetrization.
  - elcritch 5y ago
    Nim really had fantastic potential for RTL and other hardware interaction languages. Best of luck in making progress with the RTL! I’d be really interested if it could become something for program CPLD or FPGA included in some microcontrollers now.
georgelyon 5y ago
This sounds cool, I would be very interested if you had any public code. It’s _very_ early days but I’m working on a similar project in Swift: https://github.com/circt/Edith https://github.com/circt/Edith
coolreader18 5y ago
Yep, one of the main things I did with nim for the month or 2 I was really into it was write a duktape wrapper[0] (in retrospect, I should have made the name a pun related to wrapping with tape...). It was pretty interesting given the stack-based nature of almost every duktape operation. [0]: https://github.com/coolreader18/duk https://github.com/coolreader18/duk
Siira 5y ago
Isn’t the bottleneck there the core software being proprietary? I think even verilog (which is quite old) doesn’t have a mature FOSS compiler+IDE. There are also probably not that many hardware designers in the world?
- BracketMaster 5y ago
  Yosys is a very capable FOSS synthesizer and Verilator is a FOSS simulator actually used in production at ARM.
  - krupan 5y ago
    Yosys and Verilator are pretty capable if you are ok with their limitations. There is nothing akin to gcc or clang in the verilog world.
kaushalmodi 5y ago
It's great to see reference to hardware design in this thread. Not hardware, but I have been using Nim for DPI-C interface with SystemVerilog for quite some time. Few weeks back, I started tinkering with Nim macros, and started working on a project to make the VPI interface more approachable. This language is kind of a hidden gem that not many people are aware of in the HDL/HVL space.
- dom96 5y ago
  Please consider creating a write up about this. As someone that had very little knowledge about the hardware design space I'd love to learn more about it and see how Nim solves some problems there :)

thechao 5y ago

Do you have anything public? I’ve been following LLHD for a while; I like the idea of a shared middle end. LLHD’s front end is Verilog/VHDL which are … not great. Are you translating, or building your own sim runtime?

BracketMaster 5y ago
Not yet - but keep an eye out here: https://github.com/chipeleven https://github.com/chipeleven
BracketMaster 5y ago
Simulator is written internally in Nim. There isn't really a good FOSS IR for RTL sims on the market currently. I absolutely refuse to use MLIR or anything based on LLVM for that matter. LLVM takes up to 40 minutes to rebuild on my Apple silicon. This is completely unacceptable in terms of rapid iteration.
- thechao 5y ago
  LLHD is greenfield code, so it’s not based on LLVM. I’m familiar with the authors both academically (15 years ago), and on an engineering level (now). I think it is definitely worth reviewing what they’re bringing to the table. Anyways, I think the RTL market is ripe for disruption. There was a lot of great language work done by, for instance, Ronald Garcia, directly aimed at fixing pain points in HDLs, like parsmetrization.
- elcritch 5y ago
  Nim really had fantastic potential for RTL and other hardware interaction languages. Best of luck in making progress with the RTL! I’d be really interested if it could become something for program CPLD or FPGA included in some microcontrollers now.

georgelyon 5y ago

This sounds cool, I would be very interested if you had any public code. It’s _very_ early days but I’m working on a similar project in Swift: https://github.com/circt/Edith https://github.com/circt/Edith

coolreader18 5y ago

Yep, one of the main things I did with nim for the month or 2 I was really into it was write a duktape wrapper[0] (in retrospect, I should have made the name a pun related to wrapping with tape...). It was pretty interesting given the stack-based nature of almost every duktape operation. [0]: https://github.com/coolreader18/duk https://github.com/coolreader18/duk

Siira 5y ago

Isn’t the bottleneck there the core software being proprietary? I think even verilog (which is quite old) doesn’t have a mature FOSS compiler+IDE. There are also probably not that many hardware designers in the world?

BracketMaster 5y ago
Yosys is a very capable FOSS synthesizer and Verilator is a FOSS simulator actually used in production at ARM.
- krupan 5y ago
  Yosys and Verilator are pretty capable if you are ok with their limitations. There is nothing akin to gcc or clang in the verilog world.

kaushalmodi 5y ago

It's great to see reference to hardware design in this thread. Not hardware, but I have been using Nim for DPI-C interface with SystemVerilog for quite some time. Few weeks back, I started tinkering with Nim macros, and started working on a project to make the VPI interface more approachable. This language is kind of a hidden gem that not many people are aware of in the HDL/HVL space.

dom96 5y ago
Please consider creating a write up about this. As someone that had very little knowledge about the hardware design space I'd love to learn more about it and see how Nim solves some problems there :)