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Apple's CPUs are compatible at the userspace level with normal ARM. At the kernel level, I only know of one architectural violation so far (other than adding cu
by marcan_42 5y ago
Apple's CPUs are compatible at the userspace level with normal ARM. At the kernel level, I only know of one architectural violation so far (other than adding custom optional stuff): the M1 has the HCR_EL2.E2H bit forced to 1, which forces hypervisors to use VHE mode (non-VHE operation is not supported, which is a violation of the arch spec). This only matters for hypervisors, as regular OS operation doesn't care about this.
It is true that Apple implemented a bunch of custom optional features (some of which are, arguably, in violation of architectural expectations), and they definitely have some kind of deal with ARM to be able to do this, but from a developer perspective they are all optional and can be ignored. I don't think Apple exposes any of them directly to iOS/macOS developers. They only use them internally in their own software and libraries (some are for Rosetta, some are used in Accelerate.framework, some are used to implement MAP_JIT and pthread_jit_write_protect_np, some are only used by the kernel).
- monocasa 5y agoTheir AMX instructions, and those decompress instructions you found in user space are the exact kinds of things even regular architectural license holders aren't allowed to do, even hidden behind a library. They very clearly have a special, Apple-only relationship with ARM.
- comex 5y agoSure. But the M1 doesn't drop backwards compatibility with existing (userspace) code, which nine_k arguably suggested it did.
- marcan_42 5y agoAMX is available in userspace, but only used by their Accelerate.framework library. Apple does not document or expect them to be used by any apps, and I expect they'd reject any App Store submissions that use them, as I doubt they guarantee their continued existence in their current form in future CPUs. FWIW, the compresssion instructions are used by the kernel, and I don't even know if they work from userspace. I've only ever tried them in EL2.
- spacedcowboy 5y agoThey co-founded Arm. It’s not too surprising that they know the right people there...
- floatingatoll 5y agoI'm not sure if this is the right spec, but it repeatedly references a section "Behavior of HCR_EL2.E2H" that I can't find anywhere in the 4700-page PDF "Arm® Architecture Registers, Armv8, for Armv8-A architecture profile" https://developer.arm.com/documentation/ddi0595/2021-03/AArch64-Registers/HCR-EL2--Hypervisor-Configuration-Register?lang=en#fieldset_0-34_34-1 https://developer.arm.com/documentation/ddi0595/2021-03/AArc...
- saagarjha 5y agohttps://cpu.fyi/d/98dfae https://cpu.fyi/d/98dfae
- mlindner 5y agoThis is a link to a pdf document from https://cpu.fyi/ https://cpu.fyi/ with the link pointing to an entry labeled "ARMv8-A Architecture Reference Manual"
- floatingatoll 5y agoThanks, I appreciate the guidance!
- saagarjha 5y agoGah, I copied that link wrong. I meant to reference https://cpu.fyi/d/98dfae#G23.11082057 https://cpu.fyi/d/98dfae#G23.11082057, which is that specific section about HCR_EL2.E2H's behavior.
- floatingatoll 5y agoAh. Thx!