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No AVX support with Rosetta2. Rosetta2 supports up through SSE2. That's the latest instruction set to no longer be patented as of around 2020. They can use x86
by hajile 5y ago
No AVX support with Rosetta2.
Rosetta2 supports up through SSE2. That's the latest instruction set to no longer be patented as of around 2020. They can use x86_64 only because AMD released x86_64 spec in 1999 (even though actual chips came much later).
- gsnedders 5y agoIt certainly claims to support many things later than SSE2, including everything up to SEE4.2, on this MacBook Air (M1): % arch -x86_64 sysctl -a | grep machdep.cpu.features machdep.cpu.features: FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV PAT PSE36 CLFSH DS ACPI MMX FXSR SSE SSE2 SS HTT TM PBE SSE3 PCLMULQDQ DTSE64 MON DSCPL VMX EST TM2 SSSE3 CX16 TPR PDCM SSE4.1 SSE4.2 AES SEGLIM64
- creato 5y agoI think a more likely explanation is that they supported everything that fits in 128 bit registers (the same as ARM NEON). Trying to emulate code using 256 bit registers on a machine with 128 bit registers is probably difficult and pathologically slow in some cases.