2 ms·
What timing! This is probably better for StackOverflow, but is there a way to AND two AVX operands and also get the ZF flag set if the result is zero? It seems
by secondcoming 6y ago
What timing! This is probably better for StackOverflow, but is there a way to AND two AVX operands and also get the ZF flag set if the result is zero?
It seems like there's one intrinsic to do the AND but this doesn't set ZF. [0]
But there's another instrinsic that will set ZF but doesn't actually store the result of the AND operation [1].
[0] vpand ymm, ymm, ymm
[1] vtestpd ymm, ymm
I'm guessing that either a) I'm missing an instruction, or having to modify EFLAGS from AVX instructions incurs a large penalty and so it's not advisable?
- Const-me 6y agoI don’t think you’re missing an instruction. A few comments, still. Bitwise instructions are very cheap, 1 cycle of latency. Skylake can run 3 of them every clock, Zen 2 can run 4 of them per clock. I wouldn’t worry about that extra vpand instruction too much. About vptest, the latency is not great, 6-7 cycles. If you gonna branch on the outcome, and the branch is not predictable (your code takes random branch every time the instruction at specific address is running), you gonna waste time. Sometimes that’s unavoidable, like when your goal is something similar to memchr() function (however I’d recommend _mm256_movemask_epi8 instead for that). But other times it’s possible to rework into something better: mask lanes with _mm256_blendv_[something], zero out stuff with bitwise AND, that kind of stuff.
- deleted 6y ago[deleted]