A paper I read a few months ago compared instruction density between a few different ISAs. Thumb was 15% denser and aarch64 was around 15% less dense compared t

A paper I read a few months ago compared instruction density between a few different ISAs. Thumb was 15% denser and aarch64 was around 15% less dense compared to x86. Unfortunately, mode switching in thumb impacts performance which is why they dropped it. RISCV compressed instructions are interesting in that they offer the same compact code as thumb, but without the switching penalty (internally, they are expanded in place to normal 32-bit instructions before execution). If they added some dedicated instructions in place of some fused ones, that density could probably increase even more (I say probably because two 16-bit instructions can equal one 32-bit dedicated instruction in a lot of those cases). It’ll be interesting to see what happens when they start designing high performance chips in the near future.