3 ms·
Variable length is always going to restrict the parralelism of your instruction decode (for a given chip area/power/etc cost).
by richardwhiuk 6y ago
Variable length is always going to restrict the parralelism of your instruction decode (for a given chip area/power/etc cost).
- thechao 6y agoOnly because a single instruction would take the "space" of multiple instructions in the I$-fetch-to-decode. The idea with variable-length encodings is that, for example, an 8B encoding does more than twice the work of a 4B encoding, so you lose out on the instruction slot, but win on the work done. I mean ... that's the theory.