3 ms·
This instruction does quite a bit of leg work, and it becomes obvious why a RISK architecture would need 7-8 instructions to do the same, see: https://software.
by ConcernedCoder 5y ago
This instruction does quite a bit of leg work, and it becomes obvious why a RISK architecture would need 7-8 instructions to do the same, see: https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_movemask_epi8&expand=3865 https://software.intel.com/sites/landingpage/IntrinsicsGuide...
- irdc 5y agoThis looks like a task for gorc: https://five-embeddev.com/riscv-bitmanip/draft/bext.html#generalized-or-combine-gorc-gorci https://five-embeddev.com/riscv-bitmanip/draft/bext.html#gen... (granted, that’s only 32/64 bits, but still…)