4 ms·

I never bothered to measure it but I suspect that for older CPUs dynamic consumption is not super high compared to the other elements. The main reason for that

by simias 6y ago

I never bothered to measure it but I suspect that for older CPUs dynamic consumption is not super high compared to the other elements. The main reason for that belief is that I know that some "retro" consoles didn't even feature any way to HALT the CPU and busy looping was the only possibility. In particular the MIPS CPU used by the PlayStation didn't have any way to halt the CPU. AFAIK neither did the N64. Admittedly these weren't (usually) battery powered so power draw was less of an issue, but the fact that these ISAs didn't even bother with an HALT opcode at all tells me that it wasn't really considered a super valuable feature back then. Admittedly the GameBoy CPU is CISC, so maybe it fared worse than MIPS in this case, but it was also running at a much lower clock rate, maybe a tight NOP loop didn't consume all that much.

lizknope 6y ago
When I was in school I remember a professor saying to "Never gate a clock." In the 90's I think people were worried about clock glitches. My first few years in the industry in the late 90's we had customers that didn't care about power usage. They wanted the fastest performance and would put a heat sink or bigger fan on their chip. It wasn't long after that when power usage became more important. We have had logic synthesis tools that automatically insert clock gate logic to save power using various glitchless clock cell designs.
tenebrisalietum 6y ago
Interesting fact: The TMS9900 had an IDLE instruction - I recall reading somewhere that it was implemented internally as an unconditional jump to itself. IMHO I think for older classic CPUs in embedded situations, the expectation was that if halting the CPU was needed, external logic would do that. - The video chip on the Commodore 64 halts the CPU during the frame to fetch memory every 8 lines IIRC (disabling video output increases CPU speed by a bit) - The NES halts the CPU when it tells the PPU to DMA 256 bytes of memory to sprite descriptor memory before it renders the frame. - Commodore 128 will halt the non-active CPU (Z80 or 8502). Not sure what hardware is responsible for this, probably that funky MMU chip. - The Atari 2600 has a WSYNC gregister which tells the TIA to halt the CPU until the next TV scanline starts (it otherwise doesn't use IRQs or NMIs which I found interesting). Probably halting to save power didn't matter to manufacturers until CPUs required heatsinks or for portable devies. At that point saving power is also preventing heat buildup and enabling the hardware to last longer.

by simias 6y ago

lizknope 6y ago

When I was in school I remember a professor saying to "Never gate a clock." In the 90's I think people were worried about clock glitches. My first few years in the industry in the late 90's we had customers that didn't care about power usage. They wanted the fastest performance and would put a heat sink or bigger fan on their chip. It wasn't long after that when power usage became more important. We have had logic synthesis tools that automatically insert clock gate logic to save power using various glitchless clock cell designs.

tenebrisalietum 6y ago

Interesting fact: The TMS9900 had an IDLE instruction - I recall reading somewhere that it was implemented internally as an unconditional jump to itself. IMHO I think for older classic CPUs in embedded situations, the expectation was that if halting the CPU was needed, external logic would do that. - The video chip on the Commodore 64 halts the CPU during the frame to fetch memory every 8 lines IIRC (disabling video output increases CPU speed by a bit) - The NES halts the CPU when it tells the PPU to DMA 256 bytes of memory to sprite descriptor memory before it renders the frame. - Commodore 128 will halt the non-active CPU (Z80 or 8502). Not sure what hardware is responsible for this, probably that funky MMU chip. - The Atari 2600 has a WSYNC gregister which tells the TIA to halt the CPU until the next TV scanline starts (it otherwise doesn't use IRQs or NMIs which I found interesting). Probably halting to save power didn't matter to manufacturers until CPUs required heatsinks or for portable devies. At that point saving power is also preventing heat buildup and enabling the hardware to last longer.