I never thought about it that way. So let me first answer your question and then expand on the underlying issue. You might say "J-Core failed" because of a lac

I never thought about it that way. So let me first answer your question and then expand on the underlying issue. You might say "J-Core failed" because of a lack of privilege and because of scope. J-Core just wasn't pushed by an top university and had multiple big companies invest in it. J-Core was never ment to be an industry standard covering use cases from embedded to server to super computer accelerators with an ISA designed by a comittee (i don't use designed by compute sneeringly here). J-Core was meant as a patent troll proof way for a small company to design an competitive chip for their use case on a "shoe string budget" (as far as CPU design budgets are concerned). The only reason why the wider world here about it, is because people in the company believe in open source and they didn't want anybody to have to redo this work if it fits someone's use case. RISC-V was originally created because some greedy company wanted much money for their CPU architecture to be used in the course of an professor at an prominent university. A CPU architecture is a set of trade offs. RISC-V traded compactness of the instruction set for the flexibility an 32 bit instruction set allowed and to gain back some density by having an optional compact instruction set at the cost of making the encoder slightly more complex. J-Core always has an Multiplier-Accumulator, while this optional for RISC-V. RISC-V traded suitableness for embedded use cases for agreeableness (You don't have to implement some stuff, if you don't need it), flexibility, mass appeal and i think those trade-offs worked out for what they had in mind. If the team behind J-Core took that route they wouldn't have shipped a product and had a half finished obscure standards document instead.