Sure it's an open ISA with some advantages but if I was going to have an undergrad design a small processor in a single semester I'd certainly go with RISC-V ju

Sure it's an open ISA with some advantages but if I was going to have an undergrad design a small processor in a single semester I'd certainly go with RISC-V just because it's so simple and regular. And likewise with a simple out of order processor for a grad student or senior project. And then there' the design for extensibility and only implement what you need that makes RISC-V appealing in the embedded space even apart from being free to use.